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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21105707064sm3022795ad.70.2024.10.30.20.54.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2024 20:54:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730346892; x=1730951692; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3ugS/luGbHPdTbikZPvVmg6EkfRjx/062HTT4D8BwB8=; b=XlgUUcDZXTNIRBGD07ah6xuyAa/TaXhIMjRg0er9POW0aJBc68rFsKNU1HbMj3EHL+ 3pBqwRWOAIQPplfmZOlvrpMNiqLa1j7c9myGUblxGHuIISOgcNQb8L6RX/UFpRqyfjn/ HqGGnjcB5ESocAVJEEAP1Dd44MeHj9f91JDJLLt39Su0ok43gvbyNLEzlXpDgDcn4zwm 9IvKPklJEidnnhIX874moCbP44SZ7DZi+Nm5YsophfEq9G7K3OtIxBluyApvAAL7C1CL iAU/qcvqYvPTDtGluEIX/nUfsK/O2dVK8+w8m/+KHiMsQsXx8K55nk0WPVcbeva3VHCQ fGhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730346892; x=1730951692; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3ugS/luGbHPdTbikZPvVmg6EkfRjx/062HTT4D8BwB8=; b=ltFQdDPXk0fJuL9HCw2tgIbf/nYEsq0YrTSlFUxfaOOTiKHrT0z7oNseItZzS5tUG/ FrDtB8yXswcMdpTYZMq6rKIAn/QQr8om5frqDNCHbaspifDwpjfcbcvl98VZqDSaPx1C exBJmdZWlBky0JNtqib+hYYVS4p1iQGlZ37Sjf6xRF3RX8FHp6NWDanTpC0NowqX3TvM z4Gtwxnfk9aWx4xu3swlPy1ZCUokqJP0vUyhQWOGDUI1VZIw3CGq/STK2MJXHsKRrbSx 6WwRztLMXTr0hRuqKf8JIUWvjp79KUXykCEEkTx7HABU/erD5GaUlYwvahZoXtiisnPm lsbA== X-Gm-Message-State: AOJu0Yw4N/ru8mKGhmNfiXpZcT1WsNZFhNNFHpBcP7qoj2EGKxfysIhd XNwaKnxV1xXCThb1LSS9rUZQSssx7n3eE8u67m9XbGrFfLfWzDvTmOwH+D7a X-Google-Smtp-Source: AGHT+IEy1wLc6UFlNSDYf0tJLrGhGMsmOkdJ9tBF9sCB/QuKzJo8VhvHuQ1kRGaFMddlovslCDgM4Q== X-Received: by 2002:a17:902:e851:b0:20c:a644:c5bf with SMTP id d9443c01a7336-210c69e6da0mr204646125ad.31.1730346892419; Wed, 30 Oct 2024 20:54:52 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Deepak Gupta , Jim Shu , Andy Chiu , Richard Henderson , Alistair Francis Subject: [PULL 27/50] target/riscv: tb flag for shadow stack instructions Date: Thu, 31 Oct 2024 13:52:55 +1000 Message-ID: <20241031035319.731906-28-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031035319.731906-1-alistair.francis@wdc.com> References: <20241031035319.731906-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=alistair23@gmail.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1730346982542116600 Content-Type: text/plain; charset="utf-8" From: Deepak Gupta Shadow stack instructions can be decoded as zimop / zcmop or shadow stack instructions depending on whether shadow stack are enabled at current privilege. This requires a TB flag so that correct TB generation and correct TB lookup happens. `DisasContext` gets a field indicating whether bcfi is enabled or not. Signed-off-by: Deepak Gupta Co-developed-by: Jim Shu Co-developed-by: Andy Chiu Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-ID: <20241008225010.1861630-13-debug@rivosinc.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 ++ target/riscv/cpu_helper.c | 4 ++++ target/riscv/translate.c | 3 +++ 3 files changed, 9 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 195eac81c0..47e7a91667 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -628,6 +628,8 @@ FIELD(TB_FLAGS, AXL, 26, 2) /* zicfilp needs a TB flag to track indirect branches */ FIELD(TB_FLAGS, FCFI_ENABLED, 28, 1) FIELD(TB_FLAGS, FCFI_LP_EXPECTED, 29, 1) +/* zicfiss needs a TB flag so that correct TB is located based on tb flags= */ +FIELD(TB_FLAGS, BCFI_ENABLED, 30, 1) =20 #ifdef TARGET_RISCV32 #define riscv_cpu_mxl(env) ((void)(env), MXL_RV32) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index b42abedf9e..8a30031872 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -171,6 +171,10 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *p= c, flags =3D FIELD_DP32(flags, TB_FLAGS, FCFI_ENABLED, 1); } =20 + if (cpu_get_bcfien(env)) { + flags =3D FIELD_DP32(flags, TB_FLAGS, BCFI_ENABLED, 1); + } + #ifdef CONFIG_USER_ONLY fs =3D EXT_STATUS_DIRTY; vs =3D EXT_STATUS_DIRTY; diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b5c0511b4b..afa2ed4e3a 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -119,6 +119,8 @@ typedef struct DisasContext { /* zicfilp extension. fcfi_enabled, lp expected or not */ bool fcfi_enabled; bool fcfi_lp_expected; + /* zicfiss extension, if shadow stack was enabled during TB gen */ + bool bcfi_enabled; } DisasContext; =20 static inline bool has_ext(DisasContext *ctx, uint32_t ext) @@ -1241,6 +1243,7 @@ static void riscv_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cs) ctx->pm_base_enabled =3D FIELD_EX32(tb_flags, TB_FLAGS, PM_BASE_ENABLE= D); ctx->ztso =3D cpu->cfg.ext_ztso; ctx->itrigger =3D FIELD_EX32(tb_flags, TB_FLAGS, ITRIGGER); + ctx->bcfi_enabled =3D FIELD_EX32(tb_flags, TB_FLAGS, BCFI_ENABLED); ctx->fcfi_lp_expected =3D FIELD_EX32(tb_flags, TB_FLAGS, FCFI_LP_EXPEC= TED); ctx->fcfi_enabled =3D FIELD_EX32(tb_flags, TB_FLAGS, FCFI_ENABLED); ctx->zero =3D tcg_constant_tl(0); --=20 2.47.0