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Mon, 28 Oct 2024 08:19:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGEEjSrjEHizHea+uFW5482drizHedRKHRKEeieHXAGcfBZcHdQ2AlopOgzGtEs3xZTF+OpOg== X-Received: by 2002:a5d:49c2:0:b0:37d:373c:ed24 with SMTP id ffacd0b85a97d-380610f41damr6656469f8f.4.1730128747994; Mon, 28 Oct 2024 08:19:07 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org Subject: [PATCH 04/14] target/i386: Rearrange CCOp Date: Mon, 28 Oct 2024 16:18:41 +0100 Message-ID: <20241028151851.376355-5-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241028151851.376355-1-pbonzini@redhat.com> References: <20241028151851.376355-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.373, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1730128893151116600 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Give the first few enumerators explicit integer constants, align the BWLQ enumerators. This will be used to simplify ((op - CC_OP_*B) & 3). Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20240701025115.1265117-4-richard.henderson@= linaro.org Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c89db50eddc..b605f592521 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1292,11 +1292,10 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU = *cpu, FeatureWord w); * are only needed for conditional branches. */ typedef enum { - CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ - CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC =3D flags */ - CC_OP_ADCX, /* CC_DST =3D C, CC_SRC =3D rest. */ - CC_OP_ADOX, /* CC_SRC2 =3D O, CC_SRC =3D rest. */ - CC_OP_ADCOX, /* CC_DST =3D C, CC_SRC2 =3D O, CC_SRC =3D rest. */ + CC_OP_EFLAGS =3D 0, /* all cc are explicitly computed, CC_SRC =3D fla= gs */ + CC_OP_ADCX =3D 1, /* CC_DST =3D C, CC_SRC =3D rest. */ + CC_OP_ADOX =3D 2, /* CC_SRC2 =3D O, CC_SRC =3D rest. */ + CC_OP_ADCOX =3D 3, /* CC_DST =3D C, CC_SRC2 =3D O, CC_SRC =3D rest. = */ =20 CC_OP_MULB, /* modify all flags, C, O =3D (CC_SRC !=3D 0) */ CC_OP_MULW, @@ -1369,9 +1368,12 @@ typedef enum { CC_OP_POPCNTQ__, CC_OP_POPCNT =3D sizeof(target_ulong) =3D=3D 8 ? CC_OP_POPCNTQ__ : CC_= OP_POPCNTL__, =20 + CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_NB, } CCOp; -QEMU_BUILD_BUG_ON(CC_OP_NB >=3D 128); + +/* See X86DecodedInsn.cc_op, using int8_t. */ +QEMU_BUILD_BUG_ON(CC_OP_DYNAMIC > INT8_MAX); =20 typedef struct SegmentCache { uint32_t selector; --=20 2.47.0