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Fri, 25 Oct 2024 09:02:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH7yU9yqwH3xS3296qTOuOhl/lc6/xFAIlF0HVEt+ayJm+UwhI/SN91Hx6eBRrdb5z5sOHhYw== X-Received: by 2002:a05:6402:3814:b0:5c9:367a:68d9 with SMTP id 4fb4d7f45d1cf-5cb8b1c1b13mr8213266a12.15.1729872153234; Fri, 25 Oct 2024 09:02:33 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: manos.pitsidianakis@linaro.org, zhao1.liu@intel.com, junjie.mao@hotmail.com, berrange@redhat.com Subject: [PATCH 05/23] rust/pl011: add TYPE_PL011_LUMINARY device Date: Fri, 25 Oct 2024 18:01:50 +0200 Message-ID: <20241025160209.194307-6-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025160209.194307-1-pbonzini@redhat.com> References: <20241025160209.194307-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.454, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.697, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1729872670511116600 Content-Type: text/plain; charset="utf-8" From: Manos Pitsidianakis Add a device specialization for the Luminary UART device. This commit adds a DeviceId enum that utilizes the Index trait to return different bytes depending on what device id the UART has (Arm -default- or Luminary) Signed-off-by: Manos Pitsidianakis Signed-off-by: Paolo Bonzini Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-6-051e7a25b978@lin= aro.org Tested-by: Zhao Liu --- rust/hw/char/pl011/src/device.rs | 77 ++++++++++++++++++++++++++++++-- rust/hw/char/pl011/src/lib.rs | 1 + 2 files changed, 75 insertions(+), 3 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/devi= ce.rs index f91790ff185..051c59f39ae 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -18,8 +18,6 @@ RegisterOffset, }; =20 -static PL011_ID_ARM: [c_uchar; 8] =3D [0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0,= 0x05, 0xb1]; - /// Integer Baud Rate Divider, `UARTIBRD` const IBRD_MASK: u32 =3D 0x3f; =20 @@ -31,6 +29,29 @@ /// QEMU sourced constant. pub const PL011_FIFO_DEPTH: usize =3D 16_usize; =20 +#[derive(Clone, Copy, Debug)] +enum DeviceId { + #[allow(dead_code)] + Arm =3D 0, + Luminary, +} + +impl std::ops::Index for DeviceId { + type Output =3D c_uchar; + + fn index(&self, idx: hwaddr) -> &Self::Output { + match self { + Self::Arm =3D> &Self::PL011_ID_ARM[idx as usize], + Self::Luminary =3D> &Self::PL011_ID_LUMINARY[idx as usize], + } + } +} + +impl DeviceId { + const PL011_ID_ARM: [c_uchar; 8] =3D [0x11, 0x10, 0x14, 0x00, 0x0d, 0x= f0, 0x05, 0xb1]; + const PL011_ID_LUMINARY: [c_uchar; 8] =3D [0x11, 0x00, 0x18, 0x01, 0x0= d, 0xf0, 0x05, 0xb1]; +} + #[repr(C)] #[derive(Debug, qemu_api_macros::Object)] /// PL011 Device Model in QEMU @@ -75,6 +96,8 @@ pub struct PL011State { pub clock: NonNull, #[doc(alias =3D "migrate_clk")] pub migrate_clock: bool, + /// The byte string that identifies the device. + device_id: DeviceId, } =20 impl ObjectImpl for PL011State { @@ -162,7 +185,7 @@ pub fn read( =20 std::ops::ControlFlow::Break(match RegisterOffset::try_from(offset= ) { Err(v) if (0x3f8..0x400).contains(&v) =3D> { - u64::from(PL011_ID_ARM[((offset - 0xfe0) >> 2) as usize]) + u64::from(self.device_id[(offset - 0xfe0) >> 2]) } Err(_) =3D> { // qemu_log_mask(LOG_GUEST_ERROR, "pl011_read: Bad offset = 0x%x\n", (int)offset); @@ -619,3 +642,51 @@ pub fn post_load(&mut self, _version_id: u32) -> Resul= t<(), ()> { state.as_mut().init(); } } + +#[repr(C)] +#[derive(Debug, qemu_api_macros::Object)] +/// PL011 Luminary device model. +pub struct PL011Luminary { + parent_obj: PL011State, +} + +#[repr(C)] +pub struct PL011LuminaryClass { + _inner: [u8; 0], +} + +/// Initializes a pre-allocated, unitialized instance of `PL011Luminary`. +/// +/// # Safety +/// +/// We expect the FFI user of this function to pass a valid pointer, that = has +/// the same size as [`PL011Luminary`]. We also expect the device is +/// readable/writeable from one thread at any time. +pub unsafe extern "C" fn pl011_luminary_init(obj: *mut Object) { + unsafe { + debug_assert!(!obj.is_null()); + let mut state =3D NonNull::new_unchecked(obj.cast::= ()); + let state =3D state.as_mut(); + state.parent_obj.device_id =3D DeviceId::Luminary; + } +} + +impl qemu_api::definitions::Class for PL011LuminaryClass { + const CLASS_INIT: Option< + unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut core::ffi= ::c_void), + > =3D None; + const CLASS_BASE_INIT: Option< + unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut core::ffi= ::c_void), + > =3D None; +} + +impl ObjectImpl for PL011Luminary { + type Class =3D PL011LuminaryClass; + const TYPE_INFO: qemu_api::bindings::TypeInfo =3D qemu_api::type_info!= { Self }; + const TYPE_NAME: &'static CStr =3D crate::TYPE_PL011_LUMINARY; + const PARENT_TYPE_NAME: Option<&'static CStr> =3D Some(crate::TYPE_PL0= 11); + const ABSTRACT: bool =3D false; + const INSTANCE_INIT: Option = =3D Some(pl011_luminary_init); + const INSTANCE_POST_INIT: Option =3D None; + const INSTANCE_FINALIZE: Option =3D None; +} diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index 2939ee50c99..c6bb76a7926 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -46,6 +46,7 @@ pub mod memory_ops; =20 pub const TYPE_PL011: &::core::ffi::CStr =3D c"pl011"; +pub const TYPE_PL011_LUMINARY: &::core::ffi::CStr =3D c"pl011_luminary"; =20 /// Offset of each register from the base memory address of the device. /// --=20 2.47.0