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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b57b051sm50104535e9.42.2024.10.25.07.13.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 07:13:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729865586; x=1730470386; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jjOM3QYK37qULOvoMpKikOAGRTQIulU/PhbW7+12E+A=; b=CLdBiU/1Fe8HGeL5xo32mAHXZwY5KCAkRLjHEkm3BRA+m/gnZH6OHrvtNw7cziYpaV b0cp29vrbJL8opXePKe9Fsqy20IZpfaGVEh8Sosq/1fBUW+Mrrds6xLlARLRBlDFht8k LW/2kU35JWF4kHP6tpf4cFzCUlFuGZMCMJfINohy8W18Ry5NBbhJuzpipdgcQW3BPdoP uzFxmaPHwuiHNEQjVyUhdQ7OPjS14voWjtPZOMMkX6ZPM4Y/fYMw+2IyaRy2TCiVCUSb +EHo2chM0Paf9j1pJbx63PPimIkkwzi6l7Wu2mRGoIpvFonGSbSRnaKb5H2uU/BkXj4z fpDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729865586; x=1730470386; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jjOM3QYK37qULOvoMpKikOAGRTQIulU/PhbW7+12E+A=; b=OiDYAz7qfheGe/MialAtHQN5Z3oQIRM42B2Qd1zPYg9E85AhBASCEWccyXvchpVxFR EsqEYr6M9m+ZgGh2c8PdfrV/smAay8tJ5cSNn6j9L9O5MW4FTyz6GTEwSTFBLgKOq3Hp D+s934GE9pcJZ9nK98DyMKekQ/yhBYVTxs+4PKfP+tDYPjbcwv9i3ADqLpJyRyJjP+m8 G/jrN80OYphzA3daWc+nZUzYNtPC4foHK90J2gjlwoMizqUgkZrdOnaQScG4VL6bG3cY 2t5pFBg5YhAQwpstgpnCVAMQ2LQlionQO02eESHdISr/tqKMMdjsi8wjmBVH65SzXEwn NWdg== X-Forwarded-Encrypted: i=1; AJvYcCV+PCrGbRhb6/SU/oyXd3jdEgBCjOer0liX/AvZmr70u+kJtaDBf108U83I+XLu4JpU4p/ACpe1sHAQ@nongnu.org X-Gm-Message-State: AOJu0Yy3pifFiUffbmSPimsgarB/OV2JGhoFZKAoBvTfr8dmarvwxu7l c9xSu3hNdY9PkNlVHITmQxYrPFShSOIJ7u8jh3hKZm/VSIOXZWrNOQ92T7uB/zs= X-Google-Smtp-Source: AGHT+IElcpmJ1LU46tPdnbNHuTc3BFBmHYJc+kaPi4JdihFLfSRZx1lONZoPeZB6hUVJoUrQ/Pjf/w== X-Received: by 2002:a05:600c:5118:b0:431:3a6d:b84a with SMTP id 5b1f17b1804b1-431841e12cdmr75651695e9.4.1729865585974; Fri, 25 Oct 2024 07:13:05 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Song Gao , Eduardo Habkost , "Edgar E. Iglesias" , Jiaxun Yang , Aleksandar Rikalo , Stafford Horne , Nicholas Piggin , Daniel Henrique Barboza , Yoshinori Sato , David Hildenbrand , Ilya Leoshkevich , Thomas Huth , Mark Cave-Ayland , Artyom Tarasenko , Max Filippov , qemu-ppc@nongnu.org, qemu-s390x@nongnu.org Subject: [PATCH 11/21] target/sparc: Move cpu_put_fsr(env, 0) call to reset Date: Fri, 25 Oct 2024 15:12:44 +0100 Message-Id: <20241025141254.2141506-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025141254.2141506-1-peter.maydell@linaro.org> References: <20241025141254.2141506-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1729865739163116600 Content-Type: text/plain; charset="utf-8" Currently we call cpu_put_fsr(0) in sparc_cpu_realizefn(), which initializes various fields in the CPU struct: * fsr_cexc_ftt * fcc[] * fsr_qne * fsr It also sets the rounding mode in env->fp_status. This is largely pointless, because when we later reset the CPU this will zero out all the fields up until the "end_reset_fields" label, which includes all of these (but not fp_status!) Move the cpu_put_fsr(env, 0) call to reset, because that expresses the logical requirement: we want to reset FSR to 0 on every reset. This isn't a behaviour change because the fields are all zero anyway. Signed-off-by: Peter Maydell Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/sparc/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 54cb269e0af..e7f4068a162 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -76,6 +76,7 @@ static void sparc_cpu_reset_hold(Object *obj, ResetType t= ype) env->npc =3D env->pc + 4; #endif env->cache_control =3D 0; + cpu_put_fsr(env, 0); } =20 #ifndef CONFIG_USER_ONLY @@ -805,7 +806,6 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error= **errp) env->version |=3D env->def.maxtl << 8; env->version |=3D env->def.nwindows - 1; #endif - cpu_put_fsr(env, 0); =20 cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { --=20 2.34.1