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a=openpgp; fpr=7C721DF9DB3CC7182311C0BF68BC211D47B421E1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=manos.pitsidianakis@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1729778744141116600 This code juxtaposed what should be happening according to the C device model but is not needed now that this has been reviewed (I hope) and its validity checked against what the C device does (I hope, again). No functional change. Signed-off-by: Manos Pitsidianakis --- rust/hw/char/pl011/src/device.rs | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/devi= ce.rs index 75399fa6352916fa9cc24164af0ea2e20fe29399..cf1964fecdfd6d9dae3378890aa= 8b515a1ddc036 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -347,7 +347,6 @@ pub fn read( 0 } Ok(DR) =3D> { - // s->flags &=3D ~PL011_FLAG_RXFF; self.flags.set_receive_fifo_full(false); let c =3D self.read_fifo[self.read_pos]; if self.read_count > 0 { @@ -355,11 +354,9 @@ pub fn read( self.read_pos =3D (self.read_pos + 1) & (self.fifo_dep= th() - 1); } if self.read_count =3D=3D 0 { - // self.flags |=3D PL011_FLAG_RXFE; self.flags.set_receive_fifo_empty(true); } if self.read_count + 1 =3D=3D self.read_trigger { - //self.int_level &=3D ~ INT_RX; self.int_level &=3D !registers::INT_RX; } // Update error bits. @@ -529,13 +526,6 @@ fn loopback_mdmctrl(&mut self) { * dealt with here. */ =20 - //fr =3D s->flags & ~(PL011_FLAG_RI | PL011_FLAG_DCD | - // PL011_FLAG_DSR | PL011_FLAG_CTS); - //fr |=3D (cr & CR_OUT2) ? PL011_FLAG_RI : 0; - //fr |=3D (cr & CR_OUT1) ? PL011_FLAG_DCD : 0; - //fr |=3D (cr & CR_RTS) ? PL011_FLAG_CTS : 0; - //fr |=3D (cr & CR_DTR) ? PL011_FLAG_DSR : 0; - // self.flags.set_ring_indicator(self.control.out_2()); self.flags.set_data_carrier_detect(self.control.out_1()); self.flags.set_clear_to_send(self.control.request_to_send()); @@ -546,10 +536,6 @@ fn loopback_mdmctrl(&mut self) { let mut il =3D self.int_level; =20 il &=3D !Interrupt::MS; - //il |=3D (fr & PL011_FLAG_DSR) ? INT_DSR : 0; - //il |=3D (fr & PL011_FLAG_DCD) ? INT_DCD : 0; - //il |=3D (fr & PL011_FLAG_CTS) ? INT_CTS : 0; - //il |=3D (fr & PL011_FLAG_RI) ? INT_RI : 0; =20 if self.flags.data_set_ready() { il |=3D Interrupt::DSR as u32; @@ -622,10 +608,8 @@ pub fn put_fifo(&mut self, value: c_uint) { let slot =3D (self.read_pos + self.read_count) & (depth - 1); self.read_fifo[slot] =3D value; self.read_count +=3D 1; - // s->flags &=3D ~PL011_FLAG_RXFE; self.flags.set_receive_fifo_empty(false); if self.read_count =3D=3D depth { - //s->flags |=3D PL011_FLAG_RXFF; self.flags.set_receive_fifo_full(true); } =20 --=20 2.45.2