From nobody Wed Oct 23 01:30:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1729229551; cv=none; d=zohomail.com; s=zohoarc; b=PUZDDyINKZbCiqonq8fJpY7aFKP3e6hUcEPERaX4/R7Rf6w8E5TtjSW2oR1m3lDjjak2lQOT+IvfBG+gkT6Es1T3NAB4AhfD3WTLnjSFE8IVAzLNF9n3TSEPCUXFRxw2D80pXP1gh3FT3fsJsDWuLUFkpWBctmOU9+EPfbI/O0g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1729229551; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=KHVjhQWB3q7MhE0Zk7OyTJ7y7BaPzhLYY3MqsJYPWJM=; b=XR8LruIOX8unyrDfAgdJzD8oGCVJjN5lSNS2s22I5AfWF7StgQ+DWNjZNxzotNtuRbLbzdPA3uZX3alLGJhxzxBCgPxPmUSXBDuzAiTMPG+791ycJFll2iBIB+TI4vlmXLHO1VyYoo0/kLPZYSq5MN/vlk2Y2p75kEoCnNc7cCk= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1729229551881386.894838332037; Thu, 17 Oct 2024 22:32:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1faG-0008GL-3l; Fri, 18 Oct 2024 01:31:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1fa9-0008FC-Jx; Fri, 18 Oct 2024 01:31:25 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1fa7-00089Y-UF; Fri, 18 Oct 2024 01:31:25 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Fri, 18 Oct 2024 13:31:12 +0800 Received: from localhost.localdomain (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Fri, 18 Oct 2024 13:31:12 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , Alistair Francis , "Kevin Wolf" , Hanna Reitz , Thomas Huth , Laurent Vivier , Paolo Bonzini , "open list:ASPEED BMCs" , "open list:All patches CC here" , "open list:Block layer core" CC: , , Subject: [PATCH v1 01/16] aspeed/smc: Fix write incorrect data into flash in user mode Date: Fri, 18 Oct 2024 13:30:57 +0800 Message-ID: <20241018053112.1886173-2-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241018053112.1886173-1-jamin_lin@aspeedtech.com> References: <20241018053112.1886173-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1729229552858116600 Content-Type: text/plain; charset="utf-8" According to the design of ASPEED SPI controllers user mode, users write the data to flash, the SPI drivers set the Control Register(0x10) bit 0 and 1 enter user mode. Then, SPI drivers send flash commands for writing data. Finally, SPI drivers set the Control Register (0x10) bit 2 to stop active control and restore bit 0 and 1. According to the design of ASPEED SMC model, firmware writes the Control Register and the "aspeed_smc_flash_update_ctrl" function is called. Then, this function verify Control Register(0x10) bit 0 and 1. If it set us= er mode, the value of s->snoop_index is SNOOP_START else SNOOP_OFF. If s->snoop_index is SNOOP_START, the "aspeed_smc_do_snoop" function verify the first incomming data is a new flash command and writes the corresponding dummy bytes if need. However, it did not check the current unselect status. If current unselect status is "false" and firmware set the IO MODE by Control Register bit 31:2= 8, the value of s->snoop_index will be changed to SNOOP_START again and "aspeed_smc_do_snoop" misunderstand that the incomming data is the new flash command and it causes writing unexpected data into flash. Example: 1. Firmware set user mode by Control Register bit 0 and 1(0x03) 2. SMC model set s->snoop SNOOP_START 3. Firmware set Quad Page Program with 4-Byte Address command (0x34) 4. SMC model verify this flash command and it needs 4 dummy bytes. 5. Firmware send 4 bytes address. 6. SMC model receives 4 bytes address 7. Firmware set QPI IO MODE by Control Register bit 31. (0x80000003) 8. SMC model verify new user mode by Control Register bit 0 and 1. Then, set s->snoop SNOOP_START again. (It is the wrong behavior.) 9. Firmware send 0xebd8c134 data and it should be written into flash. However, SMC model misunderstand that the first incoming data, 0x34, is the new command because the value of s->snoop is changed to SNOOP_STA= RT. Finally, SMC sned the incorrect data to flash model. Introduce a new unselect attribute in AspeedSMCState to save the current unselect status for user mode and set it "true" by default. Update "aspeed_smc_flash_update_ctrl" function to check the previous unsele= ct status. If both new unselect status and previous unselect status is differe= nt, update s->snoop_index value and call "aspeed_smc_flash_do_select". Increase VMStateDescription version 1. Signed-off-by: Jamin Lin --- hw/ssi/aspeed_smc.c | 39 +++++++++++++++++++++++++------------ include/hw/ssi/aspeed_smc.h | 1 + 2 files changed, 28 insertions(+), 12 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index e3fdc66cb2..8a6145afe9 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -417,7 +417,7 @@ static void aspeed_smc_flash_do_select(AspeedSMCFlash *= fl, bool unselect) AspeedSMCState *s =3D fl->controller; =20 trace_aspeed_smc_flash_select(fl->cs, unselect ? "un" : ""); - + s->unselect =3D unselect; qemu_set_irq(s->cs_lines[fl->cs], unselect); } =20 @@ -677,22 +677,35 @@ static const MemoryRegionOps aspeed_smc_flash_ops =3D= { static void aspeed_smc_flash_update_ctrl(AspeedSMCFlash *fl, uint32_t valu= e) { AspeedSMCState *s =3D fl->controller; - bool unselect; + bool unselect =3D false; + uint32_t old_mode; + uint32_t new_mode; + + old_mode =3D s->regs[s->r_ctrl0 + fl->cs] & CTRL_CMD_MODE_MASK; + new_mode =3D value & CTRL_CMD_MODE_MASK; =20 - /* User mode selects the CS, other modes unselect */ - unselect =3D (value & CTRL_CMD_MODE_MASK) !=3D CTRL_USERMODE; + if (old_mode =3D=3D CTRL_USERMODE) { + if (new_mode !=3D CTRL_USERMODE) { + unselect =3D true; + } =20 - /* A change of CTRL_CE_STOP_ACTIVE from 0 to 1, unselects the CS */ - if (!(s->regs[s->r_ctrl0 + fl->cs] & CTRL_CE_STOP_ACTIVE) && - value & CTRL_CE_STOP_ACTIVE) { - unselect =3D true; + /* A change of CTRL_CE_STOP_ACTIVE from 0 to 1, unselects the CS */ + if (!(s->regs[s->r_ctrl0 + fl->cs] & CTRL_CE_STOP_ACTIVE) && + value & CTRL_CE_STOP_ACTIVE) { + unselect =3D true; + } + } else { + if (new_mode !=3D CTRL_USERMODE) { + unselect =3D true; + } } =20 s->regs[s->r_ctrl0 + fl->cs] =3D value; =20 - s->snoop_index =3D unselect ? SNOOP_OFF : SNOOP_START; - - aspeed_smc_flash_do_select(fl, unselect); + if (unselect !=3D s->unselect) { + s->snoop_index =3D unselect ? SNOOP_OFF : SNOOP_START; + aspeed_smc_flash_do_select(fl, unselect); + } } =20 static void aspeed_smc_reset(DeviceState *d) @@ -737,6 +750,7 @@ static void aspeed_smc_reset(DeviceState *d) =20 s->snoop_index =3D SNOOP_OFF; s->snoop_dummies =3D 0; + s->unselect =3D true; } =20 static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int si= ze) @@ -1261,12 +1275,13 @@ static void aspeed_smc_realize(DeviceState *dev, Er= ror **errp) =20 static const VMStateDescription vmstate_aspeed_smc =3D { .name =3D "aspeed.smc", - .version_id =3D 2, + .version_id =3D 3, .minimum_version_id =3D 2, .fields =3D (const VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, AspeedSMCState, ASPEED_SMC_R_MAX), VMSTATE_UINT8(snoop_index, AspeedSMCState), VMSTATE_UINT8(snoop_dummies, AspeedSMCState), + VMSTATE_BOOL(unselect, AspeedSMCState), VMSTATE_END_OF_LIST() } }; diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index 234dca32b0..25b95e7406 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -82,6 +82,7 @@ struct AspeedSMCState { =20 uint8_t snoop_index; uint8_t snoop_dummies; + bool unselect; }; =20 typedef struct AspeedSegments { --=20 2.34.1