From nobody Wed Oct 23 00:36:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1729109536289298.1246090865337; Wed, 16 Oct 2024 13:12:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1AM8-0004pS-D7; Wed, 16 Oct 2024 16:10:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1AM6-0004pD-K6; Wed, 16 Oct 2024 16:10:50 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1AM4-0000gl-Uk; Wed, 16 Oct 2024 16:10:50 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id AF7FB98F99; Wed, 16 Oct 2024 23:10:07 +0300 (MSK) Received: from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146]) by tsrv.corpit.ru (Postfix) with ESMTP id 8F170156379; Wed, 16 Oct 2024 23:10:27 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Paolo Bonzini , Pierrick Bouvier , Michael Tokarev , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [Stable-9.1.1 39/49] meson: define qemu_isa_flags Date: Wed, 16 Oct 2024 23:09:58 +0300 Message-Id: <20241016201025.256294-7-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1729109536778116600 From: Paolo Bonzini Create a separate variable for compiler flags that enable specific instruction set extensions, so that they can be used with cc.compiles/cc.links. Note that -mfpmath=3Dsse is a code generation option but it does not enable new instructions, therefore I did not make it part of qemu_isa_flags. Suggested-by: Pierrick Bouvier Reviewed-by: Michael Tokarev Reviewed-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini (cherry picked from commit 6ae8c5382b2396d394e135c2c6d3742d11c6d0c2) Signed-off-by: Michael Tokarev diff --git a/meson.build b/meson.build index 6e467cbe7d..3031f37f45 100644 --- a/meson.build +++ b/meson.build @@ -322,6 +322,10 @@ elif host_os =3D=3D 'windows' endif endif =20 +# Choose instruction set (currently x86-only) + +qemu_isa_flags =3D [] + # __sync_fetch_and_and requires at least -march=3Di486. Many toolchains # use i686 as default anyway, but for those that don't, an explicit # specification is necessary @@ -338,7 +342,7 @@ if host_arch =3D=3D 'i386' and not cc.links(''' sfaa(&val); return val; }''') - qemu_common_flags =3D ['-march=3Di486'] + qemu_common_flags + qemu_isa_flags +=3D ['-march=3Di486'] endif =20 # Pick x86-64 baseline version @@ -354,29 +358,31 @@ if host_arch in ['i386', 'x86_64'] else # present on basically all processors but technically not part of # x86-64-v1, so only include -mneeded for x86-64 version 2 and above - qemu_common_flags =3D ['-mcx16'] + qemu_common_flags + qemu_isa_flags +=3D ['-mcx16'] endif endif if get_option('x86_version') >=3D '2' - qemu_common_flags =3D ['-mpopcnt'] + qemu_common_flags - qemu_common_flags =3D cc.get_supported_arguments('-mneeded') + qemu_co= mmon_flags + qemu_isa_flags +=3D ['-mpopcnt'] + qemu_isa_flags +=3D cc.get_supported_arguments('-mneeded') endif if get_option('x86_version') >=3D '3' - qemu_common_flags =3D ['-mmovbe', '-mabm', '-mbmi', '-mbmi2', '-mfma',= '-mf16c'] + qemu_common_flags + qemu_isa_flags +=3D ['-mmovbe', '-mabm', '-mbmi', '-mbmi2', '-mfma', '= -mf16c'] endif =20 # add required vector instruction set (each level implies those below) if get_option('x86_version') =3D=3D '1' - qemu_common_flags =3D ['-msse2'] + qemu_common_flags + qemu_isa_flags +=3D ['-msse2'] elif get_option('x86_version') =3D=3D '2' - qemu_common_flags =3D ['-msse4.2'] + qemu_common_flags + qemu_isa_flags +=3D ['-msse4.2'] elif get_option('x86_version') =3D=3D '3' - qemu_common_flags =3D ['-mavx2'] + qemu_common_flags + qemu_isa_flags +=3D ['-mavx2'] elif get_option('x86_version') =3D=3D '4' - qemu_common_flags =3D ['-mavx512f', '-mavx512bw', '-mavx512cd', '-mavx= 512dq', '-mavx512vl'] + qemu_common_flags + qemu_isa_flags +=3D ['-mavx512f', '-mavx512bw', '-mavx512cd', '-mavx51= 2dq', '-mavx512vl'] endif endif =20 +qemu_common_flags =3D qemu_isa_flags + qemu_common_flags + if get_option('prefer_static') qemu_ldflags +=3D get_option('b_pie') ? '-static-pie' : '-static' endif --=20 2.39.5