From nobody Wed Oct 23 01:29:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1728988851; cv=none; d=zohomail.com; s=zohoarc; b=BbRaocZv2HLskr1XQalq5p7N30/pQV3Qi3UYrUT/KPIEHZnpPeBSoGXyHx07sW9bM2mPqDGAmlUBMWYbxzTBtKOo0B7GxyBYMgl77LjX5sY/xkl9qbOtfN0/Mdfkm5Q+MrEmNSzm7mjypgGDRZA4/W1yzUZ79/nAOj+7eyeMIns= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1728988851; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=mjarHtZFM/0LLvrqr3eopb6Cr3L/9s4YSKz09v4sDCo=; b=dk+RRIhL66Jerb91cTfnakwesq313XVwBO1xX75m3SzaZV3whjtrgSorEgjT7qqCiOVD61nulc7SkJOiePlVlHf3vcdYFbeyIMxytgsAVuKZhgU93UAknRfi2MdSeB2iUS4crbU/Xag9agcu18LWdrh1BcHu0G2LP8lhoBd5Zj0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1728988851180856.024536376143; Tue, 15 Oct 2024 03:40:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t0ewT-0006cT-47; Tue, 15 Oct 2024 06:38:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t0ewQ-0006bp-EG for qemu-devel@nongnu.org; Tue, 15 Oct 2024 06:38:14 -0400 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t0ewO-0005vO-Kr for qemu-devel@nongnu.org; Tue, 15 Oct 2024 06:38:14 -0400 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-37d518f9abcso2868189f8f.2 for ; Tue, 15 Oct 2024 03:38:11 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d7fa7a06dsm1241635f8f.5.2024.10.15.03.38.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Oct 2024 03:38:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728988690; x=1729593490; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=mjarHtZFM/0LLvrqr3eopb6Cr3L/9s4YSKz09v4sDCo=; b=BIKXYdNcX1ndlG0L7L40aKnfvY8yC0kt/cRJepWyf7Ra5LYLEHiIV8FSwFvJeJE80A vlI8JKj5rCHpQMsiZPZ6jrEVTlqk1sP0ojx0cSF96/SrUHY+ii0/a1FB/OXTpci18EiH oJWNMG98mt+Hg1O+Y0ri7Lc8arkDmpsb8VsWHoyGmuGDMAyNE7qRIFitLZ4MORDpjMtW 9ocDbtqwD+u2rA4txmpicyPF6QedNS6dFkf5c5UNiLjnDKXIv1UUlcfof1DSG/Xq3WrS zLC2/hwkj4Q93bP3+zQVVu6dhiJfGdx8IoDYXCaenXr0/z8TWEFnScbavRB5sNzHlTLI xEHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728988690; x=1729593490; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mjarHtZFM/0LLvrqr3eopb6Cr3L/9s4YSKz09v4sDCo=; b=IY/tjihKGahbniEvDTBz9M7XuYw5nHiPUE6JTvMOe+cr2v0AGYK2u0otFEa7K8wHrv iYD1jhov8vxJ9Er/aUO0FFXWmYrMXG94/QWgGmOxuAyYNQ/rApGJm09hq6faTDMPJvGP HUcvaxOlPV5wJoSQ4JyJZzLW6BJ/hd03zose5+s7drXGdKt/fnxFzGk66esjq/Ie82bZ vI1KAWR/jVeJzjEBW1KzqMiU/rl+bhkKcPCMFGqCFDWMU+nLam8N4zwpoq39awzKfAnf ztGiVtM/HRYwIm911vq+dd5rENGnLBKPuUZAg6gP+HzZIuDVoQLIOpL0Va/9ICWU98Ev VDaQ== X-Gm-Message-State: AOJu0YzALn/B4ajBY+JloSCKHHF8YrWZMexMkr2zDrK8Al5AAUdc9BKF In7og6ZAXUZKgmcd5m/fxENn03drR8IgvEXHEpYscBGrA+rF3ZRiEWkUrc74x5HRwZFvOISMKeh o X-Google-Smtp-Source: AGHT+IFmJ3B+LNtkTdWWpz6S+uueyOULSOOOE3sL8maLHJj89ONzjOfgXfMv7J2rURSCKI1GVEST/g== X-Received: by 2002:a5d:464e:0:b0:37d:4318:d8e1 with SMTP id ffacd0b85a97d-37d551ca148mr9223670f8f.23.1728988690181; Tue, 15 Oct 2024 03:38:10 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/28] hw/arm/omap1: Remove unused omap_uwire_attach() method Date: Tue, 15 Oct 2024 11:37:41 +0100 Message-Id: <20241015103808.133024-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241015103808.133024-1-peter.maydell@linaro.org> References: <20241015103808.133024-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1728988852673116600 From: Philippe Mathieu-Daud=C3=A9 The recently removed 'cheetah' machine was the single user of the omap_uwire_attach() method. Remove it altogether with the uWireSlave structure. Replace the send/receive callbacks by Unimplemented logging. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/omap.h | 8 -------- hw/arm/omap1.c | 29 ++++++++--------------------- 2 files changed, 8 insertions(+), 29 deletions(-) diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index cf5f0219a2f..e1b6a7cdd93 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -490,15 +490,7 @@ qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s); void omap_mpuio_out_set(struct omap_mpuio_s *s, int line, qemu_irq handler= ); void omap_mpuio_key(struct omap_mpuio_s *s, int row, int col, int down); =20 -typedef struct uWireSlave { - uint16_t (*receive)(void *opaque); - void (*send)(void *opaque, uint16_t data); - void *opaque; -} uWireSlave; - struct omap_uwire_s; -void omap_uwire_attach(struct omap_uwire_s *s, - uWireSlave *slave, int chipselect); =20 struct I2SCodec { void *opaque; diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 86ee336e599..25030c7e404 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -2170,29 +2170,27 @@ struct omap_uwire_s { uint16_t rxbuf; uint16_t control; uint16_t setup[5]; - - uWireSlave *chip[4]; }; =20 static void omap_uwire_transfer_start(struct omap_uwire_s *s) { int chipselect =3D (s->control >> 10) & 3; /* INDEX */ - uWireSlave *slave =3D s->chip[chipselect]; =20 if ((s->control >> 5) & 0x1f) { /* NB_BITS_WR */ - if (s->control & (1 << 12)) /* CS_CMD */ - if (slave && slave->send) - slave->send(slave->opaque, - s->txbuf >> (16 - ((s->control >> 5) & 0x1= f))); + if (s->control & (1 << 12)) { /* CS_CMD */ + qemu_log_mask(LOG_UNIMP, "uWireSlave TX CS:%d data:0x%04x\n", + chipselect, + s->txbuf >> (16 - ((s->control >> 5) & 0x1f))); + } s->control &=3D ~(1 << 14); /* CSRB */ /* TODO: depending on s->setup[4] bits [1:0] assert an IRQ or * a DRQ. When is the level IRQ supposed to be reset? */ } =20 if ((s->control >> 0) & 0x1f) { /* NB_BITS_RD */ - if (s->control & (1 << 12)) /* CS_CMD */ - if (slave && slave->receive) - s->rxbuf =3D slave->receive(slave->opaque); + if (s->control & (1 << 12)) { /* CS_CMD */ + qemu_log_mask(LOG_UNIMP, "uWireSlave RX CS:%d\n", chipselect); + } s->control |=3D 1 << 15; /* RDRB */ /* TODO: depending on s->setup[4] bits [1:0] assert an IRQ or * a DRQ. When is the level IRQ supposed to be reset? */ @@ -2321,17 +2319,6 @@ static struct omap_uwire_s *omap_uwire_init(MemoryRe= gion *system_memory, return s; } =20 -void omap_uwire_attach(struct omap_uwire_s *s, - uWireSlave *slave, int chipselect) -{ - if (chipselect < 0 || chipselect > 3) { - error_report("%s: Bad chipselect %i", __func__, chipselect); - exit(-1); - } - - s->chip[chipselect] =3D slave; -} - /* Pseudonoise Pulse-Width Light Modulator */ struct omap_pwl_s { MemoryRegion iomem; --=20 2.34.1