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Tsirkin" , Marcel Apfelbaum , qemu-block@nongnu.org (open list:nvme) Subject: [PATCH] hw/nvme: Remove references to PCI IRQ "pulsing" when asserting Date: Tue, 15 Oct 2024 21:33:48 +1100 Message-ID: <20241015103351.688803-1-midnight@trainwit.ch> X-Mailer: git-send-email 2.44.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=103.168.172.157; envelope-from=midnight@trainwit.ch; helo=fhigh-a6-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Tue, 15 Oct 2024 08:39:33 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @trainwit.ch) X-ZM-MESSAGEID: 1728996031978116600 Content-Type: text/plain; charset="utf-8" The NVMe subsystem logs "pulsing IRQ pin" when it is asserting the PCI(e) IRQ. This is confusing as it implies a short pulse, not the level-triggered interrupts PCI(e) uses. Also remove the pci_irq_pulse() function marked with FIXME as it is no longer used by any calls. Signed-off-by: julia --- hw/nvme/trace-events | 2 +- include/hw/pci/pci.h | 10 ---------- 2 files changed, 1 insertion(+), 11 deletions(-) diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index 3a67680c6a..5d96d622ff 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -1,6 +1,6 @@ # successful events pci_nvme_irq_msix(uint32_t vector) "raising MSI-X IRQ vector %u" -pci_nvme_irq_pin(void) "pulsing IRQ pin" +pci_nvme_irq_pin(void) "asserting IRQ pin" pci_nvme_irq_masked(void) "IRQ is masked" pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) "DMA read, prp1=3D0x%"PRIx= 64" prp2=3D0x%"PRIx64"" pci_nvme_dbbuf_config(uint64_t dbs_addr, uint64_t eis_addr) "dbs_addr=3D0x= %"PRIx64" eis_addr=3D0x%"PRIx64"" diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index eb26cac810..863aab0b80 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -667,16 +667,6 @@ static inline void pci_irq_deassert(PCIDevice *pci_dev) pci_set_irq(pci_dev, 0); } =20 -/* - * FIXME: PCI does not work this way. - * All the callers to this method should be fixed. - */ -static inline void pci_irq_pulse(PCIDevice *pci_dev) -{ - pci_irq_assert(pci_dev); - pci_irq_deassert(pci_dev); -} - MSIMessage pci_get_msi_message(PCIDevice *dev, int vector); void pci_set_power(PCIDevice *pci_dev, bool state); =20 --=20 2.44.1