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Tsirkin" , Cornelia Huck , qemu-devel@nongnu.org Cc: "Hao Xiang" , "Liu, Yuan1" , "Shivam Kumar" , "Ho-Ren (Jack) Chuang" , "Yichen Wang" , Bryan Zhang Subject: [PATCH v6 06/12] util/dsa: Implement zero page checking in DSA task. Date: Wed, 9 Oct 2024 16:46:04 -0700 Message-Id: <20241009234610.27039-7-yichen.wang@bytedance.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20241009234610.27039-1-yichen.wang@bytedance.com> References: <20241009234610.27039-1-yichen.wang@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2a; envelope-from=yichen.wang@bytedance.com; helo=mail-qv1-xf2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @bytedance.com) X-ZM-MESSAGEID: 1728517810439116600 Content-Type: text/plain; charset="utf-8" From: Hao Xiang Create DSA task with operation code DSA_OPCODE_COMPVAL. Here we create two types of DSA tasks, a single DSA task and a batch DSA task. Batch DSA task reduces task submission overhead and hence should be the default option. However, due to the way DSA hardware works, a DSA batch task must contain at least two individual tasks. There are times we need to submit a single task and hence a single DSA task submission is also required. Signed-off-by: Hao Xiang Signed-off-by: Bryan Zhang Signed-off-by: Yichen Wang --- include/qemu/dsa.h | 45 ++++++-- util/dsa.c | 254 +++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 270 insertions(+), 29 deletions(-) diff --git a/include/qemu/dsa.h b/include/qemu/dsa.h index 7b30303791..89841a6ffa 100644 --- a/include/qemu/dsa.h +++ b/include/qemu/dsa.h @@ -16,6 +16,7 @@ #define QEMU_DSA_H =20 #include "qemu/error-report.h" +#include "exec/cpu-common.h" #include "qemu/thread.h" #include "qemu/queue.h" =20 @@ -70,10 +71,11 @@ typedef struct QemuDsaBatchTask { QemuDsaTaskStatus status; int batch_size; bool *results; + /* Address of each pages in pages */ + ram_addr_t *addr; QSIMPLEQ_ENTRY(QemuDsaBatchTask) entry; } QemuDsaBatchTask; =20 - /** * @brief Initializes DSA devices. * @@ -105,8 +107,26 @@ void qemu_dsa_cleanup(void); */ bool qemu_dsa_is_running(void); =20 +/** + * @brief Initializes a buffer zero DSA batch task. + * + * @param batch_size The number of zero page checking tasks in the batch. + * @return A pointer to the zero page checking tasks initialized. + */ +QemuDsaBatchTask * +buffer_zero_batch_task_init(int batch_size); + +/** + * @brief Performs the proper cleanup on a DSA batch task. + * + * @param task A pointer to the batch task to cleanup. + */ +void buffer_zero_batch_task_destroy(QemuDsaBatchTask *task); + #else =20 +typedef struct QemuDsaBatchTask {} QemuDsaBatchTask; + static inline bool qemu_dsa_is_running(void) { return false; @@ -114,19 +134,28 @@ static inline bool qemu_dsa_is_running(void) =20 static inline int qemu_dsa_init(const strList *dsa_parameter, Error **errp) { - if (dsa_parameter !=3D NULL && strlen(dsa_parameter) !=3D 0) { - error_setg(errp, "DSA is not supported."); - return -1; - } - - return 0; + error_setg(errp, "DSA accelerator is not enabled."); + return -1; } =20 static inline void qemu_dsa_start(void) {} =20 static inline void qemu_dsa_stop(void) {} =20 -static inline void qemu_dsa_cleanup(void) {} +static inline QemuDsaBatchTask *buffer_zero_batch_task_init(int batch_size) +{ + return NULL; +} + +static inline void buffer_zero_batch_task_destroy(QemuDsaBatchTask *task) = {} + +static inline int +buffer_is_zero_dsa_batch_sync(QemuDsaBatchTask *batch_task, + const void **buf, size_t count, size_t len) +{ + error_setg(errp, "DSA accelerator is not enabled."); + return -1; +} =20 #endif =20 diff --git a/util/dsa.c b/util/dsa.c index 56828bec21..d9c066ff00 100644 --- a/util/dsa.c +++ b/util/dsa.c @@ -48,6 +48,7 @@ uint32_t max_retry_count; static QemuDsaDeviceGroup dsa_group; static QemuDsaCompletionThread completion_thread; =20 +static void buffer_zero_dsa_completion(void *context); =20 /** * @brief This function opens a DSA device's work queue and @@ -176,7 +177,6 @@ dsa_device_group_start(QemuDsaDeviceGroup *group) * * @param group A pointer to the DSA device group. */ -__attribute__((unused)) static void dsa_device_group_stop(QemuDsaDeviceGroup *group) { @@ -212,7 +212,6 @@ dsa_device_group_cleanup(QemuDsaDeviceGroup *group) * @return struct QemuDsaDevice* A pointer to the next available DSA device * in the group. */ -__attribute__((unused)) static QemuDsaDevice * dsa_device_group_get_next_device(QemuDsaDeviceGroup *group) { @@ -285,7 +284,6 @@ dsa_task_enqueue(QemuDsaDeviceGroup *group, * @param group A pointer to the DSA device group. * @return QemuDsaBatchTask* The DSA task being dequeued. */ -__attribute__((unused)) static QemuDsaBatchTask * dsa_task_dequeue(QemuDsaDeviceGroup *group) { @@ -340,22 +338,6 @@ submit_wi_int(void *wq, struct dsa_hw_desc *descriptor) return 0; } =20 -/** - * @brief Synchronously submits a DSA work item to the - * device work queue. - * - * @param wq A pointer to the DSA work queue's device memory. - * @param descriptor A pointer to the DSA work item descriptor. - * - * @return int Zero if successful, non-zero otherwise. - */ -__attribute__((unused)) -static int -submit_wi(void *wq, struct dsa_hw_desc *descriptor) -{ - return submit_wi_int(wq, descriptor); -} - /** * @brief Asynchronously submits a DSA work item to the * device work queue. @@ -364,7 +346,6 @@ submit_wi(void *wq, struct dsa_hw_desc *descriptor) * * @return int Zero if successful, non-zero otherwise. */ -__attribute__((unused)) static int submit_wi_async(QemuDsaBatchTask *task) { @@ -393,7 +374,6 @@ submit_wi_async(QemuDsaBatchTask *task) * * @return int Zero if successful, non-zero otherwise. */ -__attribute__((unused)) static int submit_batch_wi_async(QemuDsaBatchTask *batch_task) { @@ -752,3 +732,235 @@ void qemu_dsa_cleanup(void) dsa_device_group_cleanup(&dsa_group); } =20 + +/* Buffer zero comparison DSA task implementations */ +/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */ + +/** + * @brief Sets a buffer zero comparison DSA task. + * + * @param descriptor A pointer to the DSA task descriptor. + * @param buf A pointer to the memory buffer. + * @param len The length of the buffer. + */ +static void +buffer_zero_task_set_int(struct dsa_hw_desc *descriptor, + const void *buf, + size_t len) +{ + struct dsa_completion_record *completion =3D + (struct dsa_completion_record *)descriptor->completion_addr; + + descriptor->xfer_size =3D len; + descriptor->src_addr =3D (uintptr_t)buf; + completion->status =3D 0; + completion->result =3D 0; +} + +/** + * @brief Resets a buffer zero comparison DSA batch task. + * + * @param task A pointer to the DSA batch task. + */ +static void +buffer_zero_task_reset(QemuDsaBatchTask *task) +{ + task->completions[0].status =3D DSA_COMP_NONE; + task->task_type =3D QEMU_DSA_TASK; + task->status =3D QEMU_DSA_TASK_READY; +} + +/** + * @brief Resets a buffer zero comparison DSA batch task. + * + * @param task A pointer to the batch task. + * @param count The number of DSA tasks this batch task will contain. + */ +static void +buffer_zero_batch_task_reset(QemuDsaBatchTask *task, size_t count) +{ + task->batch_completion.status =3D DSA_COMP_NONE; + task->batch_descriptor.desc_count =3D count; + task->task_type =3D QEMU_DSA_BATCH_TASK; + task->status =3D QEMU_DSA_TASK_READY; +} + +/** + * @brief Sets a buffer zero comparison DSA task. + * + * @param task A pointer to the DSA task. + * @param buf A pointer to the memory buffer. + * @param len The buffer length. + */ +static void +buffer_zero_task_set(QemuDsaBatchTask *task, + const void *buf, + size_t len) +{ + buffer_zero_task_reset(task); + buffer_zero_task_set_int(&task->descriptors[0], buf, len); +} + +/** + * @brief Sets a buffer zero comparison batch task. + * + * @param batch_task A pointer to the batch task. + * @param buf An array of memory buffers. + * @param count The number of buffers in the array. + * @param len The length of the buffers. + */ +static void +buffer_zero_batch_task_set(QemuDsaBatchTask *batch_task, + const void **buf, size_t count, size_t len) +{ + assert(count > 0); + assert(count <=3D batch_task->batch_size); + + buffer_zero_batch_task_reset(batch_task, count); + for (int i =3D 0; i < count; i++) { + buffer_zero_task_set_int(&batch_task->descriptors[i], buf[i], len); + } +} + +/** + * @brief Asychronously perform a buffer zero DSA operation. + * + * @param task A pointer to the batch task structure. + * @param buf A pointer to the memory buffer. + * @param len The length of the memory buffer. + * + * @return int Zero if successful, otherwise an appropriate error code. + */ +__attribute__((unused)) +static int +buffer_zero_dsa_async(QemuDsaBatchTask *task, + const void *buf, size_t len) +{ + buffer_zero_task_set(task, buf, len); + + return submit_wi_async(task); +} + +/** + * @brief Sends a memory comparison batch task to a DSA device and wait + * for completion. + * + * @param batch_task The batch task to be submitted to DSA device. + * @param buf An array of memory buffers to check for zero. + * @param count The number of buffers. + * @param len The buffer length. + */ +__attribute__((unused)) +static int +buffer_zero_dsa_batch_async(QemuDsaBatchTask *batch_task, + const void **buf, size_t count, size_t len) +{ + assert(count <=3D batch_task->batch_size); + buffer_zero_batch_task_set(batch_task, buf, count, len); + + return submit_batch_wi_async(batch_task); +} + +/** + * @brief The completion callback function for buffer zero + * comparison DSA task completion. + * + * @param context A pointer to the callback context. + */ +static void +buffer_zero_dsa_completion(void *context) +{ + assert(context !=3D NULL); + + QemuDsaBatchTask *task =3D (QemuDsaBatchTask *)context; + qemu_sem_post(&task->sem_task_complete); +} + +/** + * @brief Wait for the asynchronous DSA task to complete. + * + * @param batch_task A pointer to the buffer zero comparison batch task. + */ +__attribute__((unused)) +static void +buffer_zero_dsa_wait(QemuDsaBatchTask *batch_task) +{ + qemu_sem_wait(&batch_task->sem_task_complete); +} + +/** + * @brief Initializes a buffer zero comparison DSA task. + * + * @param descriptor A pointer to the DSA task descriptor. + * @param completion A pointer to the DSA task completion record. + */ +static void +buffer_zero_task_init_int(struct dsa_hw_desc *descriptor, + struct dsa_completion_record *completion) +{ + descriptor->opcode =3D DSA_OPCODE_COMPVAL; + descriptor->flags =3D IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CRAV; + descriptor->comp_pattern =3D (uint64_t)0; + descriptor->completion_addr =3D (uint64_t)completion; +} + +/** + * @brief Initializes a buffer zero DSA batch task. + * + * @param batch_size The number of zero page checking tasks in the batch. + * @return A pointer to the zero page checking tasks initialized. + */ +QemuDsaBatchTask * +buffer_zero_batch_task_init(int batch_size) +{ + QemuDsaBatchTask *task =3D qemu_memalign(64, sizeof(QemuDsaBatchTask)); + int descriptors_size =3D sizeof(*task->descriptors) * batch_size; + + memset(task, 0, sizeof(*task)); + task->addr =3D g_new0(ram_addr_t, batch_size); + task->results =3D g_new0(bool, batch_size); + task->batch_size =3D batch_size; + task->descriptors =3D + (struct dsa_hw_desc *)qemu_memalign(64, descriptors_size); + memset(task->descriptors, 0, descriptors_size); + task->completions =3D (struct dsa_completion_record *)qemu_memalign( + 32, sizeof(*task->completions) * batch_size); + + task->batch_completion.status =3D DSA_COMP_NONE; + task->batch_descriptor.completion_addr =3D (uint64_t)&task->batch_comp= letion; + /* TODO: Ensure that we never send a batch with count <=3D 1 */ + task->batch_descriptor.desc_count =3D 0; + task->batch_descriptor.opcode =3D DSA_OPCODE_BATCH; + task->batch_descriptor.flags =3D IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CRAV; + task->batch_descriptor.desc_list_addr =3D (uintptr_t)task->descriptors; + task->status =3D QEMU_DSA_TASK_READY; + task->group =3D &dsa_group; + task->device =3D dsa_device_group_get_next_device(&dsa_group); + + for (int i =3D 0; i < task->batch_size; i++) { + buffer_zero_task_init_int(&task->descriptors[i], + &task->completions[i]); + } + + qemu_sem_init(&task->sem_task_complete, 0); + task->completion_callback =3D buffer_zero_dsa_completion; + + return task; +} + +/** + * @brief Performs the proper cleanup on a DSA batch task. + * + * @param task A pointer to the batch task to cleanup. + */ +void +buffer_zero_batch_task_destroy(QemuDsaBatchTask *task) +{ + g_free(task->addr); + g_free(task->results); + qemu_vfree(task->descriptors); + qemu_vfree(task->completions); + task->results =3D NULL; + qemu_sem_destroy(&task->sem_task_complete); + qemu_vfree(task); +} --=20 Yichen Wang