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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71df0d65278sm7881094b3a.160.2024.10.09.08.09.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2024 08:09:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728486553; x=1729091353; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=1IdMwosD6leRGtbjgClZZbwFAyeLDeJepvMUUdOag90=; b=P5mBGekxJAShpgrYOZwOlo24GEgTTRdqRmipUJ10X8fPMdyST9dS6PvEi2S+msamKN vys6yJLi74JkWQxToFjC+ZSfAegayr3LMctdx0ClV06VAP0FkmuAYH1dj38juR7TUfje WW+xR9koHSFGzeEV3jaq/60iqwlF8vcCpqUAfyiAEECjXKqaDPARDeQ3LJT5pkl93sFJ N/YfmHuj7FgsldxFqAsMcZLdj0Csp7zas44almQyu/vo4/8H3RHvRHQYMc8oZv3rPiWx bWCr6Y1GZIn0SJx3AvIo1uj+LQp5E8iZ/h8Pz4Do1vE+xm2fhuUDUZJQXikTkkeCKeHE udcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728486553; x=1729091353; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1IdMwosD6leRGtbjgClZZbwFAyeLDeJepvMUUdOag90=; b=ToCxgVkxp+kyaDfHCkGpzWoOTsv1aJVKVYtaiOI79GfiVi9qUem17ARNAKI/OKo6Bf ADCGvaw6N9Do+rNRS4trKkW6FrpYRkbLSOdqKiotMi0NumTXOxo5sqWKXCfJ9iOIv32P gJDtOwJ32wv8yQaGPskKsPwEzMboD/xBSUazawWShbrfxm+TyhKRCLT6yl6zzoS/WslE cew2ibtJtaVkMjxbY7xVMql/4/UyEIbnQLsRWtC4HcgK0LEP1NY5DqSt84apMrpCZUpn 4ZzpX4ggDuUQ2Ur7eZJ46YgrUmHpJF3ctFT0z91ENzz5VrTTmp/RWXLQVZCyeYfhPExw GFaA== X-Gm-Message-State: AOJu0YyK431e4VuJDfy3/Wg4bagyBDj/Qz6eK2nRB9SrBwi0JWr2Onw8 tomZ2mW2bsX/ceWJVhICFVM+8K7z4aS+Bb4EZXQbTPo48hD6qW37JG1cDmhjxSwp2Nnl/42YC8l x X-Google-Smtp-Source: AGHT+IE7uJxB0FQ4p3NYLi3j24Qz3X6/nR03VhvG1LnABb98FbXBC6GSs4eziwPZ+JZT28KFRlXlYw== X-Received: by 2002:a05:6a00:1749:b0:71e:148c:4611 with SMTP id d2e1a72fcca58-71e1db6488amr4462318b3a.6.1728486552723; Wed, 09 Oct 2024 08:09:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 18/23] accel/tcg: Call cpu_ld*_code_mmu from cpu_ld*_code Date: Wed, 9 Oct 2024 08:08:50 -0700 Message-ID: <20241009150855.804605-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241009150855.804605-1-richard.henderson@linaro.org> References: <20241009150855.804605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1728486699534116600 Content-Type: text/plain; charset="utf-8" Ensure a common entry point for all code lookups. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- accel/tcg/cputlb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 59ee766d51..61daa89e06 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2954,28 +2954,28 @@ uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr a= ddr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_UB, cpu_mmu_index(cs, true)); - return do_ld1_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldb_code_mmu(env, addr, oi, 0); } =20 uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true)); - return do_ld2_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldw_code_mmu(env, addr, oi, 0); } =20 uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true)); - return do_ld4_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldl_code_mmu(env, addr, oi, 0); } =20 uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true)); - return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldq_code_mmu(env, addr, oi, 0); } =20 uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, --=20 2.43.0