From nobody Sat Nov 23 23:52:03 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1728444127; cv=none; d=zohomail.com; s=zohoarc; b=XBg/JY7HZebyJpVRhzqp2nSFunW0L08zV0dPTdR3FiI/+a1WqWBgcdYzaf3f3SSBMD3Wut8JXIR/Hk7KwUyAOwg51zxfcKGqIVH1qv4I7eg+VSPgeJ2EAh5SVpSTU8wvuUN0Bi7ofhltSL0DA7T6LJPzbvc5tGjDrE7Nv6x+LgA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1728444127; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=v7EKCkFD9ZcbqQfK48vhPfsjIA5ji5eTM20prS/2PgY=; b=gUxmZPEWj/a6r4siXD/zaY9IZTwUhZyO64Ne5KzIkQicUk5of3N0AaZ9x/G7fuYpIvqw5c1Wx6XQEvC+O4o2ybV2hmNnzYjGNtJesvBltL5cbEUVUD76iWYZU7l71Iah4uKz4LliYo5yIIJyMSQX/FUpOhwZambZLB+dTVb3lMM= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1728444127590740.4239501970644; Tue, 8 Oct 2024 20:22:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1syNGz-00075b-TR; Tue, 08 Oct 2024 23:22:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNGx-0006yl-9G; Tue, 08 Oct 2024 23:21:59 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNGv-0004YH-Io; Tue, 08 Oct 2024 23:21:59 -0400 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XNdTZ4zbLz6K5fV; Wed, 9 Oct 2024 11:21:38 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id 563F4140447; Wed, 9 Oct 2024 11:21:55 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.126.173.89) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 05:21:36 +0200 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V4 07/33] arm/virt, gicv3: Changes to pre-size GIC with possible vCPUs @machine init Date: Wed, 9 Oct 2024 04:17:49 +0100 Message-ID: <20241009031815.250096-8-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009031815.250096-1-salil.mehta@huawei.com> References: <20241009031815.250096-1-salil.mehta@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.173.89] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta From: Salil Mehta via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1728444128205116600 Content-Type: text/plain; charset="utf-8" The GIC must be pre-sized with the possible vCPUs during initialization. Th= is is essential because: 1. Memory regions and resources associated with GICC/GICR cannot be modified (i.e., added, deleted, or changed) once the VM has been initialized. 2. Additionally, the `GIC_TYPER` must be initialized with the `mp_affinity`= and CPU interface number associations, which cannot be altered after initialization. Co-developed-by: Keqian Zhu Signed-off-by: Keqian Zhu Signed-off-by: Salil Mehta --- hw/arm/virt.c | 15 ++++++++------- include/hw/arm/virt.h | 2 +- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index badde5ed7a..822c7d3d14 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -768,6 +768,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) const char *gictype; int i; unsigned int smp_cpus =3D ms->smp.cpus; + unsigned int max_cpus =3D ms->smp.max_cpus; uint32_t nb_redist_regions =3D 0; int revision; =20 @@ -792,7 +793,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) } vms->gic =3D qdev_new(gictype); qdev_prop_set_uint32(vms->gic, "revision", revision); - qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); + qdev_prop_set_uint32(vms->gic, "num-cpu", max_cpus); /* Note that the num-irq property counts both internal and external * interrupts; there are always 32 of the former (mandated by GIC spec= ). */ @@ -804,7 +805,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) if (vms->gic_version !=3D VIRT_GIC_VERSION_2) { QList *redist_region_count; uint32_t redist0_capacity =3D virt_redist_capacity(vms, VIRT_GIC_R= EDIST); - uint32_t redist0_count =3D MIN(smp_cpus, redist0_capacity); + uint32_t redist0_count =3D MIN(max_cpus, redist0_capacity); =20 nb_redist_regions =3D virt_gicv3_redist_region_count(vms); =20 @@ -815,7 +816,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) virt_redist_capacity(vms, VIRT_HIGH_GIC_REDIST2); =20 qlist_append_int(redist_region_count, - MIN(smp_cpus - redist0_count, redist1_capacity)); + MIN(max_cpus - redist0_count, redist1_capacity)); } qdev_prop_set_array(vms->gic, "redist-region-count", redist_region_count); @@ -888,7 +889,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) } else if (vms->virt) { qemu_irq irq =3D qdev_get_gpio_in(vms->gic, intidbase + ARCH_GIC_MAINT_IRQ= ); - sysbus_connect_irq(gicbusdev, i + 4 * smp_cpus, irq); + sysbus_connect_irq(gicbusdev, i + 4 * max_cpus, irq); } =20 qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0, @@ -896,11 +897,11 @@ static void create_gic(VirtMachineState *vms, MemoryR= egion *mem) + VIRTUAL_PMU_IRQ)); =20 sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_= IRQ)); - sysbus_connect_irq(gicbusdev, i + smp_cpus, + sysbus_connect_irq(gicbusdev, i + max_cpus, qdev_get_gpio_in(cpudev, ARM_CPU_FIQ)); - sysbus_connect_irq(gicbusdev, i + 2 * smp_cpus, + sysbus_connect_irq(gicbusdev, i + 2 * max_cpus, qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ)); - sysbus_connect_irq(gicbusdev, i + 3 * smp_cpus, + sysbus_connect_irq(gicbusdev, i + 3 * max_cpus, qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ)); =20 if (vms->gic_version !=3D VIRT_GIC_VERSION_2) { diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 446c574c0d..362422413c 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -214,7 +214,7 @@ static inline int virt_gicv3_redist_region_count(VirtMa= chineState *vms) =20 assert(vms->gic_version !=3D VIRT_GIC_VERSION_2); =20 - return (MACHINE(vms)->smp.cpus > redist0_capacity && + return (MACHINE(vms)->smp.max_cpus > redist0_capacity && vms->highmem_redists) ? 2 : 1; } =20 --=20 2.34.1