From nobody Sat Nov 23 23:39:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1728444366; cv=none; d=zohomail.com; s=zohoarc; b=etMo23CKnkgQTk35EKMgqcr+7pmBsWg619dCeYsEHLIGBa0lyh7GI/8OsOrf6QKL9oBma9VscVOdsiZaBKWddHiDy+Ub+SgMxwwPNQ5NCq0ZVUsdCAmxDsZjZNIF2L8JNceFcLYf2/TCgTR2mDf7nzTgNY0q2/HHjHZuU4B3jY4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1728444366; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=PMqpw0gYhIV49WF1nFtgVHeoKLNZGnwpEgzne9Ln7kc=; b=MeChcj5vGb2Jkx2ZFTzOKXnhV5gEFiiinPGDjNaN5JmB2smasXKqhxBtGOJhgDsIcsm7K951rsm2DZQDVbQX5iXe3ueZIWM4rypvCFMgcFaUgza8s7VjIolsofca0wpt6Hc9+hJHRMruQEEEF1jpNJb/z3ohqQGnlhEOoAfPp00= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1728444366139499.56769242995495; Tue, 8 Oct 2024 20:26:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1syNKm-0006RS-97; Tue, 08 Oct 2024 23:25:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNKj-0006NG-TR; Tue, 08 Oct 2024 23:25:53 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNKh-0004xj-OU; Tue, 08 Oct 2024 23:25:53 -0400 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XNdZ50ghQz6K98k; Wed, 9 Oct 2024 11:25:33 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id B7C8C140A34; Wed, 9 Oct 2024 11:25:49 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.126.173.89) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 05:25:30 +0200 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V4 19/33] target/arm: Force ARM vCPU *present* status ACPI *persistent* Date: Wed, 9 Oct 2024 04:18:01 +0100 Message-ID: <20241009031815.250096-20-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009031815.250096-1-salil.mehta@huawei.com> References: <20241009031815.250096-1-salil.mehta@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.173.89] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta From: Salil Mehta via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1728444366692116600 The ARM CPU architecture does not permit changes to CPU presence after the kernel has booted. This is an immutable requirement from ARM and represents= a strict architectural constraint [1][2]. The ACPI update [3] reinforces this by specifying that the `_STA.Present` b= it in the ACPI specification cannot be modified once the system has booted. Consequently, the firmware, ACPI, and QEMU must provide the guest kernel wi= th a persistent view of the vCPUs, even when they are not present in the QOM (i.e., when they are unplugged or have yet to be plugged into the QOM after= the kernel has booted). References: [1] KVMForum 2023 Presentation: Challenges Revisited in Supporting Virt CPU= Hotplug on architectures that don=E2=80=99t Support CPU Hotplug (like ARM64) a. Kernel Link: https://kvm-forum.qemu.org/2023/KVM-forum-cpu-hotplug_7= OJ1YyJ.pdf b. Qemu Link: https://kvm-forum.qemu.org/2023/Challenges_Revisited_in_= Supporting_Virt_CPU_Hotplug_-__ii0iNb3.pdf [2] KVMForum 2020 Presentation: Challenges in Supporting Virtual CPU Hotplu= g on SoC Based Systems (like ARM64) Link: https://kvmforum2020.sched.com/event/eE4m [3] Check comment 5 in the bugzilla entry Link: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4481#c5 Signed-off-by: Salil Mehta --- target/arm/cpu64.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 2a517fdb9f..a84f312ae2 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -794,6 +794,13 @@ static void aarch64_cpu_initfn(Object *obj) */ cs->disabled =3D true; cs->thread_id =3D 0; + /* + * To provide the guest with a persistent view of vCPU presence, ACPI = may + * need to simulate the presence of vCPUs even when they are not prese= nt in + * the QOM or are in a disabled state. This flag is utilized during the + * initialization of ACPI hotplug state and during vCPU hot-unplug eve= nts. + */ + cs->acpi_persistent =3D true; } =20 static void aarch64_cpu_finalizefn(Object *obj) --=20 2.34.1