From nobody Sun Nov 24 00:39:06 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1728444265; cv=none; d=zohomail.com; s=zohoarc; b=eNSLmn/R210XLNU76aOD+lxvFD31XTMN7XI5UIh9xO6FYKsoAUcKO6oCMe2P7Qe+kvCeUVJ6y2cUF/6fXgsXknNPX8uzhcG6+/OnbLdoYzL/ciSjaIkyi+/5vfuosplRcya4XUh9tFi/iP8p9NebG0eZ7ebviR+95I/W+VgW6Pg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1728444265; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=M4lDxnqSgDn1d6Qgt86bFZMydN5S7eVukH155mUVXUk=; b=Wu2Ukm8Sc1DJs+d1pW6/2JKqDguMAubYjb55y1PVVYLecVcWCSzgjNun0AA6roJHO7fgt8r8W53usQSVipUdx5MuIDB8nxv8PCHeHADe+mLxQ6kk17WkjJBC6ztQI5RYdCujwyh7gtalcmXSYElo7pHpHUUBmFgKCaJ1bXC8WaU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1728444265590484.4430482949101; Tue, 8 Oct 2024 20:24:25 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1syNJC-0003cz-Gb; Tue, 08 Oct 2024 23:24:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNJB-0003c3-0B; Tue, 08 Oct 2024 23:24:17 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNJ9-0004hU-3r; Tue, 08 Oct 2024 23:24:16 -0400 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XNdXC1hzLz6K98h; Wed, 9 Oct 2024 11:23:55 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id DA53A140447; Wed, 9 Oct 2024 11:24:11 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.126.173.89) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 05:23:52 +0200 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V4 14/33] arm/virt: Release objects for *disabled* possible vCPUs after init Date: Wed, 9 Oct 2024 04:17:56 +0100 Message-ID: <20241009031815.250096-15-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009031815.250096-1-salil.mehta@huawei.com> References: <20241009031815.250096-1-salil.mehta@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.173.89] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta From: Salil Mehta via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1728444266322116600 Content-Type: text/plain; charset="utf-8" During `machvirt_init()`, QOM ARMCPU objects are pre-created along with the corresponding KVM vCPUs in the host for all possible vCPUs. This is necessa= ry due to the architectural constraint that KVM restricts the deferred creatio= n of KVM vCPUs and VGIC initialization/sizing after VM initialization. Hence, VG= IC is pre-sized with possible vCPUs. After the initialization of the machine is complete, the disabled possible = KVM vCPUs are parked in the per-virt-machine list "kvm_parked_vcpus," and we re= lease the QOM ARMCPU objects for the disabled vCPUs. These will be re-created whe= n the vCPU is hotplugged again. The QOM ARMCPU object is then re-attached to the corresponding parked KVM vCPU. Alternatively, we could have chosen not to release the QOM CPU objects and = kept reusing them. This approach might require some modifications to the `qdevice_add()` interface to retrieve the old ARMCPU object instead of crea= ting a new one for the hotplug request. Each of these approaches has its own pros and cons. This prototype uses the first approach (suggestions are welcome!). Co-developed-by: Keqian Zhu Signed-off-by: Keqian Zhu Signed-off-by: Salil Mehta --- hw/arm/virt.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 696e0a9f75..d8cae70ab2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2093,6 +2093,36 @@ static void virt_cpu_post_init(VirtMachineState *vms= , MemoryRegion *sysmem) } } } + + if (kvm_enabled() || tcg_enabled()) { + CPU_FOREACH_POSSIBLE(cpu, possible_cpus) { + /* + * Now, GIC has been sized with possible CPUs and we dont requ= ire + * disabled vCPU objects to be represented in the QOM. Release= the + * disabled ARMCPU objects earlier used during init for pre-si= zing. + * + * We fake to the guest through ACPI about the presence(_STA.P= RES=3D1) + * of these non-existent vCPUs at VMM/qemu and present these as + * disabled vCPUs(_STA.ENA=3D0) so that they cant be used. The= se vCPUs + * can be later added to the guest through hotplug exchanges w= hen + * ARMCPU objects are created back again using 'device_add' QMP + * command. + */ + /* + * RFC: Question: Other approach could've been to keep them fo= rever + * and release it only once when qemu exits as part of finaliz= e or + * when new vCPU is hotplugged. In the later old could be rele= ased + * for the newly created object for the same vCPU or just reus= e the + * old QOM vCPU object? + */ + if (!qemu_enabled_cpu(cpu)) { + CPUArchId *cpu_slot; + cpu_slot =3D virt_find_cpu_slot(cpu); + cpu_slot->cpu =3D NULL; + object_unref(OBJECT(cpu)); + } + } + } } =20 static void virt_cpu_set_properties(Object *cpuobj, const CPUArchId *cpu_s= lot, --=20 2.34.1