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Wed, 09 Oct 2024 16:09:12 -0700 (PDT) From: Atish Patra Date: Wed, 09 Oct 2024 16:09:06 -0700 Subject: [PATCH RFC 08/10] target/riscv: Update event mapping hashtable for invalid events MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241009-pmu_event_machine-v1-8-dcbd7a60e3ba@rivosinc.com> References: <20241009-pmu_event_machine-v1-0-dcbd7a60e3ba@rivosinc.com> In-Reply-To: <20241009-pmu_event_machine-v1-0-dcbd7a60e3ba@rivosinc.com> To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: alexei.filippov@syntacore.com, Atish Patra , palmer@dabbelt.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, bin.meng@windriver.com, dbarboza@ventanamicro.com, alistair.francis@wdc.com X-Mailer: b4 0.15-dev-13183 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=atishp@rivosinc.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @rivosinc-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1728515441230116600 If the software programs an invalid hpmevent or selects a invalid counter mapping, the hashtable entry should be updated accordingly. Otherwise, the user may get stale value from the old mapped counter. Signed-off-by: Atish Patra --- target/riscv/pmu.c | 39 +++++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c index 3235388c66e4..24c2fe82c247 100644 --- a/target/riscv/pmu.c +++ b/target/riscv/pmu.c @@ -387,39 +387,42 @@ int riscv_pmu_update_event_map(CPURISCVState *env, ui= nt64_t value, return -1; } =20 - /* - * Expected mhpmevent value is zero for reset case. Remove the current - * mapping. - */ - if (!value) { - pthread_rwlock_wrlock(&cpu->pmu_map_lock); - g_hash_table_foreach_remove(cpu->pmu_event_ctr_map, - pmu_remove_event_map, - GUINT_TO_POINTER(ctr_idx)); - pthread_rwlock_unlock(&cpu->pmu_map_lock); - return 0; - } - event_idx =3D value & MHPMEVENT_IDX_MASK; if (riscv_pmu_htable_lookup(cpu, event_idx, &mapped_ctr_idx)) { return 0; } =20 for (i =3D 0; i < env->num_pmu_events; i++) { - if (event_idx =3D=3D env->pmu_events[i].event_id) { + if ((event_idx =3D=3D env->pmu_events[i].event_id) && + (BIT(ctr_idx) & env->pmu_events[i].counter_mask)) { valid_event =3D true; break; } } =20 - if (!valid_event) { - return -1; + pthread_rwlock_wrlock(&cpu->pmu_map_lock); + /* + * Remove the current mapping in the following cases: + * 1. mhpmevent value is zero which indicates a reset case. + * 2. An invalid event is programmed for mapping to a counter. + */ + if (!value || !valid_event) { + g_hash_table_foreach_remove(cpu->pmu_event_ctr_map, + pmu_remove_event_map, + GUINT_TO_POINTER(ctr_idx)); + pthread_rwlock_unlock(&cpu->pmu_map_lock); + return 0; } + eid_ptr =3D g_new(gint64, 1); *eid_ptr =3D event_idx; - pthread_rwlock_wrlock(&cpu->pmu_map_lock); + /* + * Insert operation will replace the value if the key exists + * As per the documentation, it will free the passed key is freed as w= ell. + * No special handling is required for replace or key management. + */ g_hash_table_insert(cpu->pmu_event_ctr_map, eid_ptr, - GUINT_TO_POINTER(ctr_idx)); + GUINT_TO_POINTER(ctr_idx)); pthread_rwlock_unlock(&cpu->pmu_map_lock); =20 return 0; --=20 2.34.1