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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1728301865; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hCth+qjrAmJgbmMuAVkuFx20F8/9rFX5SbHFTFe1FO0=; b=ULuc1EOH9OS2Q+zIWo4A+ZEkwWONkGVfWhDznbosBmtwGqXZTRnvUJeIJGhPZg6IKisBFP Fj8Iw+KTMQelsHaL/c7LETFF7pOaZn7Z54+lXuHIbG2+/g5iuSL0W+7lhsf18gah0rPGrc 3b0BEQfvlABUDQcb+pfB2QSwqs0tApw= X-MC-Unique: mXBd-XoZPsqx7oWOXjKzxg-1 From: Thomas Huth To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 10/12] target/s390x: Use explicit big-endian LD/ST API Date: Mon, 7 Oct 2024 13:50:25 +0200 Message-ID: <20241007115027.243425-11-thuth@redhat.com> In-Reply-To: <20241007115027.243425-1-thuth@redhat.com> References: <20241007115027.243425-1-thuth@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.153, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1728301941392116600 From: Philippe Mathieu-Daud=C3=A9 The S390X architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=3Dbe; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t?u?[wlq]_p' target/s390x/); \ done Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth Message-ID: <20241004163042.85922-24-philmd@linaro.org> Signed-off-by: Thomas Huth --- target/s390x/gdbstub.c | 34 +++++++++++++++++----------------- target/s390x/ioinst.c | 2 +- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c index 9ffec0bccb..63373f02ce 100644 --- a/target/s390x/gdbstub.c +++ b/target/s390x/gdbstub.c @@ -46,7 +46,7 @@ int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *= mem_buf, int n) int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { CPUS390XState *env =3D cpu_env(cs); - target_ulong tmpl =3D ldq_p(mem_buf); + target_ulong tmpl =3D ldq_be_p(mem_buf); =20 switch (n) { case S390_PSWM_REGNUM: @@ -88,7 +88,7 @@ static int cpu_write_ac_reg(CPUState *cs, uint8_t *mem_bu= f, int n) =20 switch (n) { case S390_A0_REGNUM ... S390_A15_REGNUM: - env->aregs[n] =3D ldl_p(mem_buf); + env->aregs[n] =3D ldl_be_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 4; default: @@ -123,10 +123,10 @@ static int cpu_write_fp_reg(CPUState *cs, uint8_t *me= m_buf, int n) =20 switch (n) { case S390_FPC_REGNUM: - env->fpc =3D ldl_p(mem_buf); + env->fpc =3D ldl_be_p(mem_buf); return 4; case S390_F0_REGNUM ... S390_F15_REGNUM: - *get_freg(env, n - S390_F0_REGNUM) =3D ldq_p(mem_buf); + *get_freg(env, n - S390_F0_REGNUM) =3D ldq_be_p(mem_buf); return 8; default: return 0; @@ -167,11 +167,11 @@ static int cpu_write_vreg(CPUState *cs, uint8_t *mem_= buf, int n) =20 switch (n) { case S390_V0L_REGNUM ... S390_V15L_REGNUM: - env->vregs[n][1] =3D ldq_p(mem_buf + 8); + env->vregs[n][1] =3D ldq_be_p(mem_buf + 8); return 8; case S390_V16_REGNUM ... S390_V31_REGNUM: - env->vregs[n][0] =3D ldq_p(mem_buf); - env->vregs[n][1] =3D ldq_p(mem_buf + 8); + env->vregs[n][0] =3D ldq_be_p(mem_buf); + env->vregs[n][1] =3D ldq_be_p(mem_buf + 8); return 16; default: return 0; @@ -203,7 +203,7 @@ static int cpu_write_c_reg(CPUState *cs, uint8_t *mem_b= uf, int n) =20 switch (n) { case S390_C0_REGNUM ... S390_C15_REGNUM: - env->cregs[n] =3D ldq_p(mem_buf); + env->cregs[n] =3D ldq_be_p(mem_buf); if (tcg_enabled()) { tlb_flush(env_cpu(env)); } @@ -246,19 +246,19 @@ static int cpu_write_virt_reg(CPUState *cs, uint8_t *= mem_buf, int n) =20 switch (n) { case S390_VIRT_CKC_REGNUM: - env->ckc =3D ldq_p(mem_buf); + env->ckc =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(cs); return 8; case S390_VIRT_CPUTM_REGNUM: - env->cputm =3D ldq_p(mem_buf); + env->cputm =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(cs); return 8; case S390_VIRT_BEA_REGNUM: - env->gbea =3D ldq_p(mem_buf); + env->gbea =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(cs); return 8; case S390_VIRT_PREFIX_REGNUM: - env->psa =3D ldq_p(mem_buf); + env->psa =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(cs); return 8; default: @@ -298,19 +298,19 @@ static int cpu_write_virt_kvm_reg(CPUState *cs, uint8= _t *mem_buf, int n) =20 switch (n) { case S390_VIRT_KVM_PP_REGNUM: - env->pp =3D ldq_p(mem_buf); + env->pp =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 8; case S390_VIRT_KVM_PFT_REGNUM: - env->pfault_token =3D ldq_p(mem_buf); + env->pfault_token =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 8; case S390_VIRT_KVM_PFS_REGNUM: - env->pfault_select =3D ldq_p(mem_buf); + env->pfault_select =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 8; case S390_VIRT_KVM_PFC_REGNUM: - env->pfault_compare =3D ldq_p(mem_buf); + env->pfault_compare =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 8; default: @@ -338,7 +338,7 @@ static int cpu_write_gs_reg(CPUState *cs, uint8_t *mem_= buf, int n) S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; =20 - env->gscb[n] =3D ldq_p(mem_buf); + env->gscb[n] =3D ldq_be_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 8; } diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c index bbe45a497a..a944f16c25 100644 --- a/target/s390x/ioinst.c +++ b/target/s390x/ioinst.c @@ -603,7 +603,7 @@ static int chsc_sei_nt2_have_event(void) #define CHSC_SEI_NT2 (1ULL << 61) static void ioinst_handle_chsc_sei(ChscReq *req, ChscResp *res) { - uint64_t selection_mask =3D ldq_p(&req->param1); + uint64_t selection_mask =3D ldq_be_p(&req->param1); uint8_t *res_flags =3D (uint8_t *)res->data; int have_event =3D 0; int have_more =3D 0; --=20 2.46.1