From nobody Tue Feb 10 11:15:44 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.alibaba.com ARC-Seal: i=1; a=rsa-sha256; t=1728273171; cv=none; d=zohomail.com; s=zohoarc; b=nzQegQTrhy7zrPy42mBx63wfRzuqE3Ysa3zIu8/HQMulPYIpouaL5GSF2PbUxQk17wIHU70UOa06z8+Q72GN4Vv0FL/4sBMDj71E/u/PxN/K4g8XKfeCdEfGN/8YYwxFyU57FLAwja++dVqtoPRP8RREeg66B/TYQ0pyZAK5RWU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1728273171; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tPUaAwnZss3gUgr7WUV2NsDqMky9cJt0gFBrh9g2XyA=; b=hFRy2cHINjEjp6XK+2UVxjv9mNuTiPAorjgXiJggb0+uj9XRLeGwf4ixPJBIGzLzrwQswiMmomQ3/RrDeQW3k0g+kYI9GLrn84ilorbTBlZjkHBrbwloYBULMeLPcDO42LoOgVgwm+JP8pT3IVlJw7YEBQQgHzoCjUDLTx0ssX4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1728273171155846.8337221752266; Sun, 6 Oct 2024 20:52:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sxen2-0001zE-Sd; Sun, 06 Oct 2024 23:52:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sxen0-0001ym-QM; Sun, 06 Oct 2024 23:52:06 -0400 Received: from out30-124.freemail.mail.aliyun.com ([115.124.30.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sxemx-000814-UQ; Sun, 06 Oct 2024 23:52:06 -0400 Received: from localhost.localdomain(mailfrom:zhiwei_liu@linux.alibaba.com fp:SMTPD_---0WGLTtSb_1728273111) by smtp.aliyun-inc.com; Mon, 07 Oct 2024 11:51:52 +0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1728273113; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=tPUaAwnZss3gUgr7WUV2NsDqMky9cJt0gFBrh9g2XyA=; b=e//bfv2ShLG7l0eOKaRgXJsCMg3n9ZI65jEbzuLFKfeI6evtk1ajhWbqJh4CGoAYA2YPovtIzN+5B4E9BhH9/3A4guuKntq3jvUarz1rcmOctZ/9Rj8jhXjg3ief/ipZZsORjrFhwAqjGWXqulx06sZDnrsFEsl0U4/0LOqIJg0= From: LIU Zhiwei To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, dbarboza@ventanamicro.com, liwei1518@gmail.com, bmeng.cn@gmail.com, TANG Tiancheng Subject: [PATCH v1 5/7] target/riscv: Enable 32-bit only registers for RV64 with sxl32 Date: Mon, 7 Oct 2024 11:33:58 +0800 Message-Id: <20241007033400.50163-6-zhiwei_liu@linux.alibaba.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20241007033400.50163-1-zhiwei_liu@linux.alibaba.com> References: <20241007033400.50163-1-zhiwei_liu@linux.alibaba.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=115.124.30.124; envelope-from=zhiwei_liu@linux.alibaba.com; helo=out30-124.freemail.mail.aliyun.com X-Spam_score_int: -174 X-Spam_score: -17.5 X-Spam_bar: ----------------- X-Spam_report: (-17.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, ENV_AND_HDR_SPF_MATCH=-0.5, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001, USER_IN_DEF_DKIM_WL=-7.5, USER_IN_DEF_SPF_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.alibaba.com) X-ZM-MESSAGEID: 1728273173124116600 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng Allow reading 32-bit only registers like timeh and stimecmph when booting a 32-bit Linux kernel on RV64 when sxl32 is true. Signed-off-by: TANG Tiancheng --- target/riscv/csr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 93a5cf87ed..c412ac8e31 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -161,7 +161,7 @@ skip_ext_pmu_check: =20 static RISCVException ctr32(CPURISCVState *env, int csrno) { - if (riscv_cpu_mxl(env) !=3D MXL_RV32) { + if (env->xl !=3D MXL_RV32) { return RISCV_EXCP_ILLEGAL_INST; } =20 @@ -481,7 +481,7 @@ static RISCVException sstc(CPURISCVState *env, int csrn= o) =20 static RISCVException sstc_32(CPURISCVState *env, int csrno) { - if (riscv_cpu_mxl(env) !=3D MXL_RV32) { + if (env->xl !=3D MXL_RV32) { return RISCV_EXCP_ILLEGAL_INST; } =20 --=20 2.43.0