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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c13931055sm16493405ad.139.2024.10.05.13.06.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Oct 2024 13:06:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728158766; x=1728763566; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rMIQXnxelIQ86qxYbOA8sg/WFq9fqYpMUetqZ1DDKfA=; b=PGghxLTt2ynfVDocQ4D+KSHzuhMQ0qVlz0psDELCA8gLqiC+FCLCUzlLQu44sPtQht ytLS/5S4bu3wlr3cF093Kjh7LiNYP8dgjzPtsu9JkNVvi7Im+DhRZkEhitGusUMqSQIR AkRprgZaiHHZXLcrs4Bq7UYp2Uev7H0n1LRQh9XUmiKj5+2cWKDZy1+S5bonyzXyN6Jg /blAXFcVcE48xmUmXCJorOooh+pYnscnAeTPwgy2v8PHsQP4hrEQ4eYTvLPWIDS2vnQH +W1aTMlxxxrI2ITsS2KQNAN9sTbQIc9dA5RPE82DPagKoDe4LrQJyYsrMQZrUWDd1+YR JpBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728158766; x=1728763566; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rMIQXnxelIQ86qxYbOA8sg/WFq9fqYpMUetqZ1DDKfA=; b=waRF1jZs+A8u53rMlMiYVGze4Bm7zGIhLRgkV3ekI1O7/xdeydwxl97OB54bq081Kx ou3EjSjqmmvM6xXjwgxSJM4VaDfJmV98rgeBgWcNs9bxye2avb9dUaClTWlpokBo02h9 W0IZIhNQexVsj2TwbI2jF24hYQ1HIQgc796vfPVpi6iGKkzd0Rhq8PYEGE1kyWLailGj ciTfDY6VKLBHAiCoidAG5817NsxTLVPj6rP5VxlLRQX5t1rBxUxZqYSGazhd3QDvUDx8 ToPwY9CIieJYatO+rM5vjJY0T4i12pA/L7tIkPHQwpoUdavFZTMIu/rLvFQSDvwzv6NZ lEGw== X-Gm-Message-State: AOJu0YxO9f80Ko+k5F+1aLYfPdk4kk3rKAJvnVFUDhKF7bxA5TPkjXRr GMdCeKTi5kP4DCbsNfga4nI6PRr3t6lC8MDCZ0xDeSc+rm9zuGgpXkBm/xHVOqrbHi8601WpneK U X-Google-Smtp-Source: AGHT+IHH1UPbilIVxeQbQP7YVJkO3rAkayOpruqAQpJ8VTJH0ulhL8QO7zYfsZKakqfCs3+vPIEAIw== X-Received: by 2002:a17:902:f545:b0:20b:a576:1896 with SMTP id d9443c01a7336-20bff190668mr89400615ad.43.1728158766201; Sat, 05 Oct 2024 13:06:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@kernel.org, peter.maydell@linaro.org, alex.bennee@linaro.org, linux-parisc@vger.kernel.org, qemu-arm@nongnu.org Subject: [PATCH v2 05/21] include/exec/memop: Introduce memop_atomicity_bits Date: Sat, 5 Oct 2024 13:05:44 -0700 Message-ID: <20241005200600.493604-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241005200600.493604-1-richard.henderson@linaro.org> References: <20241005200600.493604-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1728158869481116600 Content-Type: text/plain; charset="utf-8" Split out of mmu_lookup. Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Reviewed-by: Peter Maydell --- include/exec/memop.h | 24 ++++++++++++++++++++++++ accel/tcg/cputlb.c | 16 ++-------------- 2 files changed, 26 insertions(+), 14 deletions(-) diff --git a/include/exec/memop.h b/include/exec/memop.h index f53bf618c6..b699bf7688 100644 --- a/include/exec/memop.h +++ b/include/exec/memop.h @@ -193,4 +193,28 @@ static inline unsigned memop_alignment_bits(MemOp memo= p) return a; } =20 +/* + * memop_atomicity_bits: + * @memop: MemOp value + * + * Extract the atomicity size from the memop. + */ +static inline unsigned memop_atomicity_bits(MemOp memop) +{ + unsigned size =3D memop & MO_SIZE; + + switch (memop & MO_ATOM_MASK) { + case MO_ATOM_NONE: + size =3D MO_8; + break; + case MO_ATOM_IFALIGN_PAIR: + case MO_ATOM_WITHIN16_PAIR: + size =3D size ? size - 1 : 0; + break; + default: + break; + } + return size; +} + #endif diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b5bff220a3..f5fca5a118 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1751,20 +1751,8 @@ static bool mmu_lookup(CPUState *cpu, vaddr addr, Me= mOpIdx oi, * Device memory type require alignment. */ if (unlikely(flags & TLB_CHECK_ALIGNED)) { - MemOp size =3D l->memop & MO_SIZE; - - switch (l->memop & MO_ATOM_MASK) { - case MO_ATOM_NONE: - size =3D MO_8; - break; - case MO_ATOM_IFALIGN_PAIR: - case MO_ATOM_WITHIN16_PAIR: - size =3D size ? size - 1 : 0; - break; - default: - break; - } - if (addr & ((1 << size) - 1)) { + a_bits =3D memop_atomicity_bits(l->memop); + if (addr & ((1 << a_bits) - 1)) { cpu_unaligned_access(cpu, addr, type, l->mmu_idx, ra); } } --=20 2.43.0