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Iglesias" , qemu-ppc@nongnu.org, Marcel Apfelbaum , Aleksandar Rikalo , Daniel Henrique Barboza , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Nicholas Piggin , qemu-arm@nongnu.org, Zhao Liu , Peter Maydell , Jiaxun Yang Subject: [PATCH 8/8] hw/core/cpu: Expose cpu_is_big_endian() method Date: Fri, 4 Oct 2024 13:21:18 -0300 Message-ID: <20241004162118.84570-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241004162118.84570-1-philmd@linaro.org> References: <20241004162118.84570-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=philmd@linaro.org; helo=mail-lf1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1728059072053116600 Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 8 ++++++++ hw/core/cpu-common.c | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 22ef7a44e86..2550bc98dee 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -608,6 +608,14 @@ extern __thread CPUState *current_cpu; extern bool mttcg_enabled; #define qemu_tcg_mttcg_enabled() (mttcg_enabled) =20 +/** + * cpu_is_big_endian: + * @cpu: The CPU whose state is to be inspected. + * + * Returns: %true if the CPU runs in big endianness, %false otherwise. + */ +bool cpu_is_big_endian(CPUState *cpu); + /** * cpu_paging_enabled: * @cpu: The CPU whose state is to be inspected. diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index aa5ea9761e4..277c4ee6720 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -66,6 +66,13 @@ CPUState *cpu_create(const char *typename) return cpu; } =20 +bool cpu_is_big_endian(CPUState *cpu) +{ + CPUClass *cc =3D CPU_GET_CLASS(cpu); + + return cc->is_big_endian(cpu); +} + /* Resetting the IRQ comes from across the code base so we take the * BQL here if we need to. cpu_interrupt assumes it is held.*/ void cpu_reset_interrupt(CPUState *cpu, int mask) --=20 2.45.2