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Tsirkin" , Thomas Huth , Bastian Koppelmann , Richard Henderson , Pierrick Bouvier Subject: [PATCH 11/16] hw/sparc: Use explicit big-endian LD/ST API Date: Fri, 4 Oct 2024 01:42:06 +0200 Message-ID: <20241003234211.53644-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241003234211.53644-1-philmd@linaro.org> References: <20241003234211.53644-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1727999063017116600 The SPARC architecture uses big endianness. Directly use the big-endian LD/ST API. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Chigot Cl=C3=A9ment Reviewed-by: Mark Cave-Ayland --- hw/sparc/leon3.c | 42 +++++++++++++++++++++--------------------- hw/sparc/sun4m.c | 6 +++--- hw/sparc64/sun4u.c | 6 +++--- 3 files changed, 27 insertions(+), 27 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 6aaa04cb191..021b5070128 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -78,21 +78,21 @@ typedef struct ResetData { =20 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) { - stl_p(code++, 0x82100000); /* mov %g0, %g1 */ - stl_p(code++, 0x84100000); /* mov %g0, %g2 */ - stl_p(code++, 0x03000000 + + stl_be_p(code++, 0x82100000); /* mov %g0, %g1 */ + stl_be_p(code++, 0x84100000); /* mov %g0, %g2 */ + stl_be_p(code++, 0x03000000 + extract32(addr, 10, 22)); /* sethi %hi(addr), %g1 */ - stl_p(code++, 0x82106000 + + stl_be_p(code++, 0x82106000 + extract32(addr, 0, 10)); /* or %g1, addr, %g1 */ - stl_p(code++, 0x05000000 + + stl_be_p(code++, 0x05000000 + extract32(val, 10, 22)); /* sethi %hi(val), %g2 */ - stl_p(code++, 0x8410a000 + + stl_be_p(code++, 0x8410a000 + extract32(val, 0, 10)); /* or %g2, val, %g2 */ - stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ + stl_be_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ =20 return code; } @@ -112,13 +112,13 @@ static void write_bootloader(void *ptr, hwaddr kernel= _addr) =20 /* If we are running on a secondary CPU, jump directly to the kernel. = */ =20 - stl_p(p++, 0x85444000); /* rd %asr17, %g2 */ - stl_p(p++, 0x8530a01c); /* srl %g2, 0x1c, %g2 */ - stl_p(p++, 0x80908000); /* tst %g2 */ + stl_be_p(p++, 0x85444000); /* rd %asr17, %g2 */ + stl_be_p(p++, 0x8530a01c); /* srl %g2, 0x1c, %g2 */ + stl_be_p(p++, 0x80908000); /* tst %g2 */ /* Filled below. */ sec_cpu_branch_p =3D p; - stl_p(p++, 0x0BADC0DE); /* bne xxx */ - stl_p(p++, 0x01000000); /* nop */ + stl_be_p(p++, 0x0BADC0DE); /* bne xxx */ + stl_be_p(p++, 0x01000000); /* nop */ =20 /* Initialize the UARTs */ /* *UART_CONTROL =3D UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ @@ -133,17 +133,17 @@ static void write_bootloader(void *ptr, hwaddr kernel= _addr) p =3D gen_store_u32(p, 0x80000318, 3); =20 /* Now, the relative branch above can be computed. */ - stl_p(sec_cpu_branch_p, 0x12800000 - + (p - sec_cpu_branch_p)); + stl_be_p(sec_cpu_branch_p, 0x12800000 + + (p - sec_cpu_branch_p)); =20 /* JUMP to the entry point */ - stl_p(p++, 0x82100000); /* mov %g0, %g1 */ - stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); - /* sethi %hi(kernel_addr), %g1 */ - stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); - /* or kernel_addr, %g1 */ - stl_p(p++, 0x81c04000); /* jmp %g1 */ - stl_p(p++, 0x01000000); /* nop */ + stl_be_p(p++, 0x82100000); /* mov %g0, %g1 */ + stl_be_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); + /* sethi %hi(kernel_addr), %g1 */ + stl_be_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); + /* or kernel_addr, %g1 */ + stl_be_p(p++, 0x81c04000); /* jmp %g1 */ + stl_be_p(p++, 0x01000000); /* nop */ } =20 static void leon3_cpu_reset(void *opaque) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index d52e6a7213f..f375f0d389b 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -271,9 +271,9 @@ static unsigned long sun4m_load_kernel(const char *kern= el_filename, if (*initrd_size > 0) { for (i =3D 0; i < 64 * TARGET_PAGE_SIZE; i +=3D TARGET_PAGE_SI= ZE) { ptr =3D rom_ptr(KERNEL_LOAD_ADDR + i, 24); - if (ptr && ldl_p(ptr) =3D=3D 0x48647253) { /* HdrS */ - stl_p(ptr + 16, INITRD_LOAD_ADDR); - stl_p(ptr + 20, *initrd_size); + if (ptr && ldl_be_p(ptr) =3D=3D 0x48647253) { /* HdrS */ + stl_be_p(ptr + 16, INITRD_LOAD_ADDR); + stl_be_p(ptr + 20, *initrd_size); break; } } diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 4ece1ac1ffc..e591e5a741a 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -210,9 +210,9 @@ static uint64_t sun4u_load_kernel(const char *kernel_fi= lename, if (*initrd_size > 0) { for (i =3D 0; i < 64 * TARGET_PAGE_SIZE; i +=3D TARGET_PAGE_SI= ZE) { ptr =3D rom_ptr(*kernel_addr + i, 32); - if (ptr && ldl_p(ptr + 8) =3D=3D 0x48647253) { /* HdrS */ - stl_p(ptr + 24, *initrd_addr + *kernel_addr); - stl_p(ptr + 28, *initrd_size); + if (ptr && ldl_be_p(ptr + 8) =3D=3D 0x48647253) { /* HdrS = */ + stl_be_p(ptr + 24, *initrd_addr + *kernel_addr); + stl_be_p(ptr + 28, *initrd_size); break; } } --=20 2.45.2