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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=103.168.172.153; envelope-from=its@irrelevant.dk; helo=fhigh-a2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @irrelevant.dk) X-ZM-MESSAGEID: 1727791999441116600 Content-Type: text/plain; charset="utf-8" From: Arun Kumar Indicate that 'MDTS and Size Limits Exclude Metadata (MEM)' in the Controller Attributes (CTRATT) I/O Command Set Independent Identify Controller Data Structure. Signed-off-by: Arun Kumar Reviewed-by: Klaus Jensen [k.jensen: updated commit message] Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 19 ++++++++++++++----- include/block/nvme.h | 3 +++ 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index a720dbc354a2..050cb63e3390 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -2653,6 +2653,7 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeRequest = *req) uint64_t slba =3D le64_to_cpu(rw->slba); uint32_t nlb =3D le16_to_cpu(rw->nlb) + 1; size_t len =3D nvme_l2b(ns, nlb); + size_t data_len =3D len; int64_t offset =3D nvme_l2b(ns, slba); uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint32_t reftag =3D le32_to_cpu(rw->reftag); @@ -2672,7 +2673,11 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeRequest= *req) } } =20 - if (len > n->page_size << n->params.vsl) { + if (nvme_ns_ext(ns) && !(NVME_ID_CTRL_CTRATT_MEM(n->id_ctrl.ctratt))) { + data_len +=3D nvme_m2b(ns, nlb); + } + + if (data_len > (n->page_size << n->params.vsl)) { return NVME_INVALID_FIELD | NVME_DNR; } =20 @@ -3413,7 +3418,11 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeReques= t *req) len +=3D nvme_m2b(ns, nlb); } =20 - status =3D nvme_check_mdts(n, len); + if (NVME_ID_CTRL_CTRATT_MEM(n->id_ctrl.ctratt)) { + status =3D nvme_check_mdts(n, data_len); + } else { + status =3D nvme_check_mdts(n, len); + } if (status) { return status; } @@ -3590,7 +3599,7 @@ static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *r= eq) BlockBackend *blk =3D ns->blkconf.blk; uint16_t status; =20 - if (nvme_ns_ext(ns)) { + if (nvme_ns_ext(ns) && !(NVME_ID_CTRL_CTRATT_MEM(n->id_ctrl.ctratt))) { mapped_size +=3D nvme_m2b(ns, nlb); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { @@ -3702,7 +3711,7 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeReques= t *req, bool append, BlockBackend *blk =3D ns->blkconf.blk; uint16_t status; =20 - if (nvme_ns_ext(ns)) { + if (nvme_ns_ext(ns) && !(NVME_ID_CTRL_CTRATT_MEM(n->id_ctrl.ctratt))) { mapped_size +=3D nvme_m2b(ns, nlb); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { @@ -8483,7 +8492,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pc= i_dev) id->cntlid =3D cpu_to_le16(n->cntlid); =20 id->oaes =3D cpu_to_le32(NVME_OAES_NS_ATTR); - ctratt =3D NVME_CTRATT_ELBAS; + ctratt =3D NVME_CTRATT_ELBAS | NVME_CTRATT_MEM; =20 id->rab =3D 6; =20 diff --git a/include/block/nvme.h b/include/block/nvme.h index 5298bc4a2867..a37be0d0da8e 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -1182,6 +1182,7 @@ enum NvmeIdCtrlOaes { enum NvmeIdCtrlCtratt { NVME_CTRATT_ENDGRPS =3D 1 << 4, NVME_CTRATT_ELBAS =3D 1 << 15, + NVME_CTRATT_MEM =3D 1 << 16, NVME_CTRATT_FDPS =3D 1 << 19, }; =20 @@ -1285,6 +1286,8 @@ enum NvmeNsAttachmentOperation { #define NVME_ERR_REC_TLER(err_rec) (err_rec & 0xffff) #define NVME_ERR_REC_DULBE(err_rec) (err_rec & 0x10000) =20 +#define NVME_ID_CTRL_CTRATT_MEM(ctratt) (ctratt & NVME_CTRATT_MEM) + enum NvmeFeatureIds { NVME_ARBITRATION =3D 0x1, NVME_POWER_MANAGEMENT =3D 0x2, --=20 2.45.2