From nobody Wed Oct 23 00:26:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1727792080; cv=none; d=zohomail.com; s=zohoarc; b=E3TFv3U9bPTOrzWYE0BJ671xokmvEtr56S9H+9sI3ylBzVof/ClcGMiPol72A69LZVTBS7UDjIpay4bCdJ5b+9HlV2VBRirT9+gNqTZSxkcX+P8uUu+jL5RZTCBW3VBwlNxVtI65ECSrSnSKZkFjPrriSSjRRBZisq+r41JwS7E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1727792080; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=8WyRANg5BvgWreVGOfqG0vhqUbn/aWYycvZXoUj4rnY=; b=nL2uHXK7YdNH+B3k91bW3YX74O01Ij2QlffFk8QnP/1SmpUuQ96UEoG/yMM5F9iG/+2QoJNsjPcmqZZfz3YX9ndYvDxyY9h7K/h5fyB9xkeRT1lNAiB3Oh6vyb/Lj0JfH81VqnlyVzp8W5iRt1YxuTyVFov3mOqxsyxZAUsHLKU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1727792080108689.9798772477951; Tue, 1 Oct 2024 07:14:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1svdcH-0000Br-TA; Tue, 01 Oct 2024 10:12:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1svdc0-0007oj-7X; Tue, 01 Oct 2024 10:12:29 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1svdbt-0002zy-TS; Tue, 01 Oct 2024 10:12:21 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Tue, 1 Oct 2024 10:43:36 +0800 Received: from localhost.localdomain (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Tue, 1 Oct 2024 10:43:36 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , Thomas Huth , Laurent Vivier , Paolo Bonzini , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , , , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PATCH v7 6/8] aspeed/soc: Correct GPIO irq 130 for AST2700 Date: Tue, 1 Oct 2024 10:43:32 +0800 Message-ID: <20241001024334.834807-7-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241001024334.834807-1-jamin_lin@aspeedtech.com> References: <20241001024334.834807-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1727792082087116600 The register set of GPIO have a significant change since AST2700. Each GPIO pin has their own individual control register and users are able = to set one GPIO pin=E2=80=99s direction, interrupt enable, input mask and so o= n in the same one control register. AST2700 does not have GPIO18_XXX registers for GPIO 1.8v, removes ASPEED_DEV_GPIO_1_8V. It is enough to only have ASPEED_DEV_GPIO device in AST2700. The AST2700 GPIO controller interrupt is connected to GICINT130_INTC at bit 18. Therefore, correct GPIO irq 130. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_ast27x0.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 761ee11657..99135edc1e 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -87,8 +87,7 @@ static const int aspeed_soc_ast2700_irqmap[] =3D { [ASPEED_DEV_ADC] =3D 130, [ASPEED_DEV_XDMA] =3D 5, [ASPEED_DEV_EMMC] =3D 15, - [ASPEED_DEV_GPIO] =3D 11, - [ASPEED_DEV_GPIO_1_8V] =3D 130, + [ASPEED_DEV_GPIO] =3D 130, [ASPEED_DEV_RTC] =3D 13, [ASPEED_DEV_TIMER1] =3D 16, [ASPEED_DEV_TIMER2] =3D 17, @@ -124,7 +123,7 @@ static const int aspeed_soc_ast2700_gic128_intcmap[] = =3D { static const int aspeed_soc_ast2700_gic130_intcmap[] =3D { [ASPEED_DEV_I2C] =3D 0, [ASPEED_DEV_ADC] =3D 16, - [ASPEED_DEV_GPIO_1_8V] =3D 18, + [ASPEED_DEV_GPIO] =3D 18, }; =20 /* GICINT 131 */ --=20 2.34.1