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[217.169.11.214]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37cd56e665asm9400515f8f.64.2024.09.30.09.53.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2024 09:53:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727715182; x=1728319982; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=f94PuGbY3o4nfnvd44/JCW0gaP0F8DVpfbjuvceZQ8U=; b=JkH5oGH9DJva8Fivoql3C99H2fXH8SKhexXjymblxqLbm/iS8MyBHv9nEkknAdQrxw rhoojI4lGGo69VxFtct++1GszzO9Z5X0oBha6gpcS4blXKAl1Yp13wQ0XF1LfbsPGy7z pEWxP/LU3iUkqGvohGWfGL7TSjTWL8G+0wYj2WA+7TaCXCPLewzsfhXPJT0lPWzBH8WC gx3EvZbWbldI7FlQxbcusYdds0I+t+nMFLbh3ldXKokkWdzu0glsnuK4Vg+aDzxRhj/t OpVp7LuKhVt+tCfe9TCmcH7VUEe0eynTyC/TuUqOPni09XjKxGFbeT7LFvWYSE2GjS8D ZdTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727715182; x=1728319982; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=f94PuGbY3o4nfnvd44/JCW0gaP0F8DVpfbjuvceZQ8U=; b=fgTpzGr6O2hslTPiWH/F1CWeY3epOjj1WMCDuEJVPQb+UtphNnt2tHhaHvm6hkQ/HH Zp1vlCxWyBN+n4VFd93xzAKKZPBUJxfheM+vvqR00CsTsEDEcbQnW/3CxAV4utqQ+7aD /FbxAE2h4BGdHJaP7zOMcnhmDi03oa3yD7eb7cfhwGoSY0ULerotMzK8Nr7dV/rHx6ko 5cwyWf3mKBXylQGpTL2iqgehgCvtfytkFfaVlI3NfDlLV4aEyiqgbK2myGx8Sxr6KhLw gUJmooHXOFXRm6rUg9OnZSV9AQK3/d78atJrltlghxccZtGtg+ed0iN893RVnkRQJ0Ya WT1A== X-Gm-Message-State: AOJu0YzwGW9JzrGKtfb2Sr3ZE/gpYDzAyCT1ii30LwIQyq9R6TMbabGn gVG4rAy0jvKNU6JICPWvO5vdEsjw4SedJvEEXG3uA1p+lm3g1AnHomgMJe0bvsYWvYgkk8scI/k TdQU= X-Google-Smtp-Source: AGHT+IHsu7sT9MgFfB5pjqN9V2Mf5/k+CIAC2noYd3q64RZWb2Z+b8uDRgFzzxBQqdfb0WCiXsxTWA== X-Received: by 2002:adf:edc9:0:b0:37c:c5d6:b2d2 with SMTP id ffacd0b85a97d-37cd59df35amr7965088f8f.0.1727715181929; Mon, 30 Sep 2024 09:53:01 -0700 (PDT) From: Rob Bradford To: qemu-devel@nongnu.org Cc: Rob Bradford , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs) Subject: [PATCH] target/riscv: Set vtype.vill on CPU reset Date: Mon, 30 Sep 2024 17:52:57 +0100 Message-ID: <20240930165258.72258-1-rbradford@rivosinc.com> X-Mailer: git-send-email 2.46.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=rbradford@rivosinc.com; helo=mail-wm1-x336.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @rivosinc-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1727715213757116600 Content-Type: text/plain; charset="utf-8" The RISC-V unprivileged specification "31.3.11. State of Vector Extension at Reset" has a note that recommends vtype.vill be set on reset as part of ensuring that the vector extension have a consistent state at reset. This change now makes QEMU consistent with Spike which sets vtype.vill on reset. Signed-off-by: Rob Bradford Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4bda754b01..af602e3caf 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -997,6 +997,7 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType= type) cs->exception_index =3D RISCV_EXCP_NONE; env->load_res =3D -1; set_default_nan_mode(1, &env->fp_status); + env->vill =3D true; =20 #ifndef CONFIG_USER_ONLY if (cpu->cfg.debug) { --=20 2.46.0