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Tsirkin" , Sven Schnelle , Jiaxun Yang , qemu-arm@nongnu.org, Aurelien Jarno , Pierrick Bouvier , Max Filippov , Paul Burton Subject: [PATCH 09/13] exec/memory_ldst_phys: Introduce ld/st_endian_phys() API Date: Mon, 30 Sep 2024 09:34:46 +0200 Message-ID: <20240930073450.33195-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240930073450.33195-1-philmd@linaro.org> References: <20240930073450.33195-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1727683622081116600 Introduce the ld/st_endian_phys() API, which takes an extra boolean argument to dispatch to ld/st_{be,le}_phys() methods. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- TODO: Update docstring regexp --- include/exec/memory_ldst_phys.h.inc | 66 +++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst= _phys.h.inc index ecd678610d..8ea162b40d 100644 --- a/include/exec/memory_ldst_phys.h.inc +++ b/include/exec/memory_ldst_phys.h.inc @@ -74,6 +74,16 @@ static inline uint16_t glue(lduw_be_phys, SUFFIX)(ARG1_D= ECL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NUL= L); } =20 +static inline uint16_t glue(lduw_endian_phys, SUFFIX)(bool big_endian, + ARG1_DECL, hwaddr ad= dr) +{ + return big_endian + ? glue(address_space_lduw_le, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, N= ULL) + : glue(address_space_lduw_be, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, N= ULL); +} + static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_ldl_le, SUFFIX)(ARG1, addr, @@ -86,6 +96,16 @@ static inline uint32_t glue(ldl_be_phys, SUFFIX)(ARG1_DE= CL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NULL= ); } =20 +static inline uint32_t glue(ldl_endian_phys, SUFFIX)(bool big_endian, + ARG1_DECL, hwaddr add= r) +{ + return big_endian + ? glue(address_space_ldl_le, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NU= LL) + : glue(address_space_ldl_be, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NU= LL); +} + static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_ldq_le, SUFFIX)(ARG1, addr, @@ -98,6 +118,16 @@ static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_D= ECL, hwaddr addr) MEMTXATTRS_UNSPECIFIED, NULL= ); } =20 +static inline uint32_t glue(ldq_endian_phys, SUFFIX)(bool big_endian, + ARG1_DECL, hwaddr add= r) +{ + return big_endian + ? glue(address_space_ldq_le, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NU= LL) + : glue(address_space_ldq_be, SUFFIX)(ARG1, addr, + MEMTXATTRS_UNSPECIFIED, NU= LL); +} + static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t = val) { glue(address_space_stb, SUFFIX)(ARG1, addr, val, @@ -116,6 +146,18 @@ static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL= , hwaddr addr, uint16_t va MEMTXATTRS_UNSPECIFIED, NULL); } =20 +static inline void glue(stw_endian_phys, SUFFIX)(bool big_endian, ARG1_DEC= L, + hwaddr addr, uint16_t val) +{ + if (big_endian) { + glue(address_space_stw_be, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); + } else { + glue(address_space_stw_le, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); + } +} + static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint3= 2_t val) { glue(address_space_stl_le, SUFFIX)(ARG1, addr, val, @@ -128,6 +170,18 @@ static inline void glue(stl_be_phys, SUFFIX)(ARG1_DECL= , hwaddr addr, uint32_t va MEMTXATTRS_UNSPECIFIED, NULL); } =20 +static inline void glue(stl_endian_phys, SUFFIX)(bool big_endian, ARG1_DEC= L, + hwaddr addr, uint32_t val) +{ + if (big_endian) { + glue(address_space_stl_be, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); + } else { + glue(address_space_stl_le, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); + } +} + static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint6= 4_t val) { glue(address_space_stq_le, SUFFIX)(ARG1, addr, val, @@ -139,6 +193,18 @@ static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL= , hwaddr addr, uint64_t va glue(address_space_stq_be, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } + +static inline void glue(stq_endian_phys, SUFFIX)(bool big_endian, ARG1_DEC= L, + hwaddr addr, uint64_t val) +{ + if (big_endian) { + glue(address_space_stq_be, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); + } else { + glue(address_space_stq_le, SUFFIX)(ARG1, addr, val, + MEMTXATTRS_UNSPECIFIED, NULL); + } +} #endif =20 #undef ARG1_DECL --=20 2.45.2