From nobody Wed Oct 23 01:37:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1727084588; cv=none; d=zohomail.com; s=zohoarc; b=G8uK6Fyfbhc3bvdE7xn3zy0EOuSl2ZvLamZOjJGVuFR50Fj4y9sBjgbem1xyTDagYhf2qC3GZqDHfZCr2vpPPqL3QmOSDGrwFKJeWgCgg0Vqay+ubHtjDt8pjDkVYZY+qmtPs+uOHdLCXWdJvT3WpUQGQDV9SvvanG8CobHXpfM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1727084588; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=PQoljFqy27Tlq7V8RRoqXCwduISkCwkLa9gJLMIsI+U=; b=PxcJPEuKqLSOw8eB3vSzC8fuJn7SbU4LahVXXfIiLu9wWXl2cDjR4xsNUqiduuusmhv2bHf82kSj9oMWZ1kgm22yMzHZJv6o7o10oDPqtqYa1ERhAgtwRUP6NbKLQDbO7dhBJKf4BXsK+ch+JtmfqYJ83OubYuJBa/Ndu1c6WRA= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1727084588457226.2828620639491; Mon, 23 Sep 2024 02:43:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ssfaT-0000dV-Pk; Mon, 23 Sep 2024 05:42:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ssfaP-0000Rw-Sn; Mon, 23 Sep 2024 05:42:30 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ssfaN-0008C9-R3; Mon, 23 Sep 2024 05:42:29 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Mon, 23 Sep 2024 17:42:06 +0800 Received: from localhost.localdomain (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Mon, 23 Sep 2024 17:42:06 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , , Subject: [PATCH 2/5] hw/gpio/aspeed: Support to set the different memory size Date: Mon, 23 Sep 2024 17:42:02 +0800 Message-ID: <20240923094206.1455783-3-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240923094206.1455783-1-jamin_lin@aspeedtech.com> References: <20240923094206.1455783-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1727084589812116600 Content-Type: text/plain; charset="utf-8" According to the datasheet of ASPEED SOCs, a GPIO controller owns 4KB of register space for AST2700, AST2500, AST2400 and AST1030; owns 2KB of register space for AST2600 1.8v and owns 2KB of register space for AST2600 3.3v. It set the memory region size 2KB by default and it does not compatible register space for AST2700. Introduce a new class attribute to set the GPIO controller memory size for different ASPEED SOCs. Signed-off-by: Jamin Lin --- hw/gpio/aspeed_gpio.c | 7 ++++++- include/hw/gpio/aspeed_gpio.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index 901b576144..94a5f3ee03 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -1048,7 +1048,7 @@ static void aspeed_gpio_realize(DeviceState *dev, Err= or **errp) } =20 memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_gpio_ops, s, - TYPE_ASPEED_GPIO, 0x800); + TYPE_ASPEED_GPIO, agc->mem_size); =20 sysbus_init_mmio(sbd, &s->iomem); } @@ -1131,6 +1131,7 @@ static void aspeed_gpio_ast2400_class_init(ObjectClas= s *klass, void *data) agc->nr_gpio_sets =3D 7; agc->reg_table =3D aspeed_3_3v_gpios; agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; + agc->mem_size =3D 0x1000; } =20 static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data) @@ -1142,6 +1143,7 @@ static void aspeed_gpio_2500_class_init(ObjectClass *= klass, void *data) agc->nr_gpio_sets =3D 8; agc->reg_table =3D aspeed_3_3v_gpios; agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; + agc->mem_size =3D 0x1000; } =20 static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *= data) @@ -1153,6 +1155,7 @@ static void aspeed_gpio_ast2600_3_3v_class_init(Objec= tClass *klass, void *data) agc->nr_gpio_sets =3D 7; agc->reg_table =3D aspeed_3_3v_gpios; agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; + agc->mem_size =3D 0x800; } =20 static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *= data) @@ -1164,6 +1167,7 @@ static void aspeed_gpio_ast2600_1_8v_class_init(Objec= tClass *klass, void *data) agc->nr_gpio_sets =3D 2; agc->reg_table =3D aspeed_1_8v_gpios; agc->reg_table_count =3D GPIO_1_8V_REG_ARRAY_SIZE; + agc->mem_size =3D 0x800; } =20 static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data) @@ -1175,6 +1179,7 @@ static void aspeed_gpio_1030_class_init(ObjectClass *= klass, void *data) agc->nr_gpio_sets =3D 6; agc->reg_table =3D aspeed_3_3v_gpios; agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; + agc->mem_size =3D 0x1000; } =20 static const TypeInfo aspeed_gpio_info =3D { diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h index 39febda9ea..8cd2ff5496 100644 --- a/include/hw/gpio/aspeed_gpio.h +++ b/include/hw/gpio/aspeed_gpio.h @@ -76,6 +76,7 @@ struct AspeedGPIOClass { uint32_t nr_gpio_sets; const AspeedGPIOReg *reg_table; unsigned reg_table_count; + uint64_t mem_size; }; =20 struct AspeedGPIOState { --=20 2.34.1