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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e754091d3sm21667845e9.10.2024.09.19.06.11.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Sep 2024 06:11:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1726751470; x=1727356270; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=yJUYEhTNiz8x7jW5BdcZtlOjlfWgR1fgHUkwcdaNL2s=; b=UnWSGbjVkFHYKDRJ3N4FXxzNJmzRxWv8pa7mXko1KRVWA5C4RcAMughRDhwWz9V83j EpzCfBM7JW7SvFmFbNqG4uVJ7Yo9Bb5atGSy9nklMYP5qkGmprJz47whsfuvifvbMAOc yTTQcPh1wcb4khPZE/TYNg3cB4Ycd9NYW/bF97ujea7qPAFbFR/u+6XH11234+ghE9Ed EQi2aO1O/ffX71GES7+9lHph5fFozAjCCSqM063xK0A66Ruk071lEwJcAJ82tqnPtyxe 5PXbe47LJC7q5MEWv6lld98x+mkezIdi4YxUrPhYQX6fvbIodrJtJhecGLCBtRD+Vhz0 5/Dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726751470; x=1727356270; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yJUYEhTNiz8x7jW5BdcZtlOjlfWgR1fgHUkwcdaNL2s=; b=r25lWFsoYbO16JVZt4PMvvr3SPHTfyyP1779U/E8VLFYfb4HKPQN13IAfBopkagZ// 4r6vPI4tMF/IUn94is9Z3DC5su2TKqtkSsQccP56zArga7i4TlRl0IG3j/0b+uZyfkXs fYPrqzMH+kbwHTat7I2usjn7zZHN5U8QDxZgiFbHIe4TGxi5iMvrbypx4MLD4DKGNKZZ JP6V76EXINuWaaxNhS7RtQAEFmvb0DsFjQtbk3vP/iG/QJeqizfC3xxyQvitBwkdxxYD D+m8f6BBbEpIw/+xMwkj2UjEze1RP0n4DD2Zg8fxO9KgbPtxabELOS+hAufnaT/Kt+i2 Wnbw== X-Gm-Message-State: AOJu0YwdzGFEkOogFh68CUTmJVK1RXBL3pOA9kKdYhJ3TXRVhaxUdusX WkC6olv3Fdi7l1mLPWZcSCrx8SslrIIFIhkJYIJ9TzSrrcs04/0/30ymL7saizO9GZ0+9BxyQjg 4 X-Google-Smtp-Source: AGHT+IFwkcVmCki0NuRoxmQ/MOwRFzdK+lycU0c0OgAotNRBSl/beDdz3b09iW1vUdVbZK4nTdB0AQ== X-Received: by 2002:a05:600c:4f01:b0:42c:aeaa:6b0d with SMTP id 5b1f17b1804b1-42d907205a5mr212889925e9.9.1726751469997; Thu, 19 Sep 2024 06:11:09 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/38] target/arm: Use cmpsel in gen_sshl_vec Date: Thu, 19 Sep 2024 14:10:32 +0100 Message-Id: <20240919131106.3362543-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240919131106.3362543-1-peter.maydell@linaro.org> References: <20240919131106.3362543-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726751666916116600 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Instead of cmp+and or cmp+andc, use cmpsel. This will be better for hosts that use predicate registers for cmp. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20240912024114.1097832-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/tcg/gengvec.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c index 3edbf3a2627..c5fc1b6cfbf 100644 --- a/target/arm/tcg/gengvec.c +++ b/target/arm/tcg/gengvec.c @@ -1160,7 +1160,6 @@ static void gen_sshl_vec(unsigned vece, TCGv_vec dst, TCGv_vec rval =3D tcg_temp_new_vec_matching(dst); TCGv_vec lsh =3D tcg_temp_new_vec_matching(dst); TCGv_vec rsh =3D tcg_temp_new_vec_matching(dst); - TCGv_vec tmp =3D tcg_temp_new_vec_matching(dst); TCGv_vec max, zero; =20 /* @@ -1180,16 +1179,15 @@ static void gen_sshl_vec(unsigned vece, TCGv_vec ds= t, /* Bound rsh so out of bound right shift gets -1. */ max =3D tcg_constant_vec_matching(dst, vece, (8 << vece) - 1); tcg_gen_umin_vec(vece, rsh, rsh, max); - tcg_gen_cmp_vec(TCG_COND_GT, vece, tmp, lsh, max); =20 tcg_gen_shlv_vec(vece, lval, src, lsh); tcg_gen_sarv_vec(vece, rval, src, rsh); =20 /* Select in-bound left shift. */ - tcg_gen_andc_vec(vece, lval, lval, tmp); + zero =3D tcg_constant_vec_matching(dst, vece, 0); + tcg_gen_cmpsel_vec(TCG_COND_GT, vece, lval, lsh, max, zero, lval); =20 /* Select between left and right shift. */ - zero =3D tcg_constant_vec_matching(dst, vece, 0); if (vece =3D=3D MO_8) { tcg_gen_cmpsel_vec(TCG_COND_LT, vece, dst, lsh, zero, rval, lval); } else { @@ -1203,7 +1201,7 @@ void gen_gvec_sshl(unsigned vece, uint32_t rd_ofs, ui= nt32_t rn_ofs, { static const TCGOpcode vecop_list[] =3D { INDEX_op_neg_vec, INDEX_op_umin_vec, INDEX_op_shlv_vec, - INDEX_op_sarv_vec, INDEX_op_cmp_vec, INDEX_op_cmpsel_vec, 0 + INDEX_op_sarv_vec, INDEX_op_cmpsel_vec, 0 }; static const GVecGen3 ops[4] =3D { { .fniv =3D gen_sshl_vec, --=20 2.34.1