From nobody Wed Oct 23 00:28:02 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1726725416; cv=none; d=zohomail.com; s=zohoarc; b=JwHKhlPuku1qNc0y3vyZFb3PlQv7giE9Gn+bQmmlCeuettTamn+MtRMBcS7uNwjffbGkE6MBpuPudWX9L2jUiPFK8Lr7uT5QogB7LjLJ5UInjcuMYDWmjDTrIsKNr8DWlIlPEc4xo8PUWQY18bUXw7Tr0FSOsq3rbyt9rdjfspc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1726725416; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xXR3XGGYXWS+TpLAPs/Qt834zvnQSu+nJ0ihF3QdWh8=; b=C9rh79ZY+9hVjDieiaBiVh+4Wud5N1ER6EcEpiySmFI5IMV+1jeEyMxejvZhtcqOoJzRooyTKaVAPA1siD8EDm3b66zxPhb484V8lGCa+xIu6XYLBipUO/QN8fn7BpAlxWGr9nN+HRPrtnISlEilgfIW/77wTOdGPhBkqY5Fz9c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1726725416394872.0120340009233; Wed, 18 Sep 2024 22:56:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1srA9d-0000S4-P3; Thu, 19 Sep 2024 01:56:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1srA9F-0006nx-ER; Thu, 19 Sep 2024 01:56:17 -0400 Received: from mgamail.intel.com ([192.198.163.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1srA9B-0007OB-ER; Thu, 19 Sep 2024 01:56:12 -0400 Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2024 22:56:07 -0700 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa006.fm.intel.com with ESMTP; 18 Sep 2024 22:56:01 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726725370; x=1758261370; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8gzS+6OwF3KgPtXFuFeQ8LrUaVl5pHIgZpajPFYb5x4=; b=h3Im7bv2EHfLdDhltP7L0t1tPH7Ra6ml1YT+vOUjuAwiBqRDN8uylbK+ BUQoUzNoXDshpYxjaQEHkNy4uKjW/G3VHh06S+YjRmNyKhNebgKDGTON3 nPjB4Ok23H4t4A5b8h4r0lYor8re+ZJNhgxcKKUDyikCwhcPJBHNCWCqZ 1BljRLqzm+4osR318dyY34ZVzoVMkqTch9Dz9YzvmTQgIH2IHfO+DCcZp XqOx8Ke6tQdzWdXlytdiY5PK4XhSp+VJc3MZthl6G91nz5q2C/XLbyKQf LV1aOMZFb3J9GjEYcxEHigy8M2twYMCFGLXBTrbLVX/PffqrK5Pbs9sGX A==; X-CSE-ConnectionGUID: iQi8/n3aQAmvtP76TWeTYw== X-CSE-MsgGUID: 1efk/sxpQ0ucijSw7Ks4lA== X-IronPort-AV: E=McAfee;i="6700,10204,11199"; a="25813607" X-IronPort-AV: E=Sophos;i="6.10,240,1719903600"; d="scan'208";a="25813607" X-CSE-ConnectionGUID: gUHshS+6Qa+f/5DU/ygquA== X-CSE-MsgGUID: cvkL99LVRG6pb7HnWQ57VQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,240,1719903600"; d="scan'208";a="69418731" From: Zhao Liu To: =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Igor Mammedov , Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Paolo Bonzini , Richard Henderson , Sergio Lopez , Jason Wang , Stefano Stabellini , Anthony PERARD , Paul Durrant , "Edgar E . Iglesias" , Eric Blake , Markus Armbruster , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Peter Maydell Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-arm@nongnu.org, Zhenyu Wang , Dapeng Mi , Yongwei Ma , Zhao Liu Subject: [RFC v2 06/12] hw/cpu: Constrain CPU topology tree with max_limit Date: Thu, 19 Sep 2024 14:11:22 +0800 Message-Id: <20240919061128.769139-7-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240919061128.769139-1-zhao1.liu@intel.com> References: <20240919061128.769139-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.15; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1726725418180116600 Content-Type: text/plain; charset="utf-8" Apply max_limit to CPU topology and prevent the number of topology devices from exceeding the max limitation configured by user. Additionally, ensure that CPUs created from the CLI via custom topology meet at least the requirements of smp.cpus. This guarantees that custom topology will always have CPUs. Signed-off-by: Zhao Liu --- hw/core/machine.c | 4 ++++ hw/cpu/cpu-slot.c | 32 ++++++++++++++++++++++++++++++++ include/hw/cpu/cpu-slot.h | 1 + include/hw/qdev-core.h | 5 +++++ 4 files changed, 42 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index dedabd75c825..54fca9eb7265 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1684,6 +1684,10 @@ void machine_run_board_post_init(MachineState *machi= ne, Error **errp) { MachineClass *machine_class =3D MACHINE_GET_CLASS(machine); =20 + if (!machine_validate_topo_tree(machine, errp)) { + return; + } + if (machine_class->post_init) { machine_class->post_init(machine); } diff --git a/hw/cpu/cpu-slot.c b/hw/cpu/cpu-slot.c index 2d16a2729501..f2b9c412926f 100644 --- a/hw/cpu/cpu-slot.c +++ b/hw/cpu/cpu-slot.c @@ -47,6 +47,7 @@ static void cpu_slot_device_realize(DeviceListener *liste= ner, { CPUSlot *slot =3D container_of(listener, CPUSlot, listener); CPUTopoState *topo; + int max_children; =20 if (!object_dynamic_cast(OBJECT(dev), TYPE_CPU_TOPO)) { return; @@ -54,6 +55,13 @@ static void cpu_slot_device_realize(DeviceListener *list= ener, =20 topo =3D CPU_TOPO(dev); cpu_slot_add_topo_info(slot, topo); + + if (dev->parent_bus) { + max_children =3D slot->stat.entries[GET_CPU_TOPO_LEVEL(topo)].max_= limit; + if (dev->parent_bus->num_children =3D=3D max_children) { + qbus_mark_full(dev->parent_bus); + } + } } =20 static void cpu_slot_del_topo_info(CPUSlot *slot, CPUTopoState *topo) @@ -79,6 +87,10 @@ static void cpu_slot_device_unrealize(DeviceListener *li= stener, =20 topo =3D CPU_TOPO(dev); cpu_slot_del_topo_info(slot, topo); + + if (dev->parent_bus) { + qbus_mask_full(dev->parent_bus); + } } =20 DeviceListener cpu_slot_device_listener =3D { @@ -443,3 +455,23 @@ bool machine_parse_custom_topo_config(MachineState *ms, =20 return true; } + +bool machine_validate_topo_tree(MachineState *ms, Error **errp) +{ + int cpus; + + if (!ms->topo || !ms->topo->custom_topo_enabled) { + return true; + } + + cpus =3D ms->topo->stat.entries[CPU_TOPOLOGY_LEVEL_THREAD].total_insta= nces; + if (cpus < ms->smp.cpus) { + error_setg(errp, "machine requires at least %d online CPUs, " + "but currently only %d CPUs", + ms->smp.cpus, cpus); + return false; + } + + /* TODO: Add checks for other levels to honor more -smp parameters. */ + return true; +} diff --git a/include/hw/cpu/cpu-slot.h b/include/hw/cpu/cpu-slot.h index 8d7e35aa1851..f56a0b08dca4 100644 --- a/include/hw/cpu/cpu-slot.h +++ b/include/hw/cpu/cpu-slot.h @@ -84,5 +84,6 @@ int get_max_topo_by_level(const MachineState *ms, CpuTopo= logyLevel level); bool machine_parse_custom_topo_config(MachineState *ms, const SMPConfiguration *config, Error **errp); +bool machine_validate_topo_tree(MachineState *ms, Error **errp); =20 #endif /* CPU_SLOT_H */ diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index ddcaa329e3ec..3f2117e08774 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -1063,6 +1063,11 @@ static inline void qbus_mark_full(BusState *bus) bus->full =3D true; } =20 +static inline void qbus_mask_full(BusState *bus) +{ + bus->full =3D false; +} + void device_listener_register(DeviceListener *listener); void device_listener_unregister(DeviceListener *listener); =20 --=20 2.34.1