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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::b49; envelope-from=3qSjrZgUKCuQZGbOVMUUMRK.IUSWKSa-JKbKRTUTMTa.UXM@flex--tavip.bounces.google.com; helo=mail-yb1-xb49.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1726687659477116600 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add basic support for the RT595-EVK board, enough to be able to run the NXP's microXpresso SDK hello world example. Signed-off-by: Octavian Purdila --- hw/arm/rt595-evk.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++ hw/arm/Kconfig | 5 ++++ hw/arm/meson.build | 1 + 3 files changed, 70 insertions(+) create mode 100644 hw/arm/rt595-evk.c diff --git a/hw/arm/rt595-evk.c b/hw/arm/rt595-evk.c new file mode 100644 index 0000000000..e5daecc8b8 --- /dev/null +++ b/hw/arm/rt595-evk.c @@ -0,0 +1,64 @@ +/* + * i.MX RT595 EVK + * + * Copyright (c) 2024 Google LLC + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "elf.h" +#include "exec/address-spaces.h" +#include "hw/loader.h" +#include "hw/sysbus.h" +#include "hw/boards.h" +#include "qemu/log.h" +#include "hw/arm/armv7m.h" +#include "hw/arm/boot.h" +#include "qapi/error.h" +#include "hw/arm/rt500.h" +#include "hw/qdev-clock.h" +#include "sysemu/reset.h" + +static void rt595_evk_reset(MachineState *ms, ShutdownCause reason) +{ + /* + * CPU reset is not done by default, we need to do it manually when the + * machine is reset. + */ + cpu_reset(first_cpu); + + qemu_devices_reset(reason); +} + +static void rt595_evk_init(MachineState *ms) +{ + RT500State *s; + Clock *sysclk; + + sysclk =3D clock_new(OBJECT(ms), "SYSCLK"); + clock_set_hz(sysclk, 200000000); + + s =3D RT500(object_new(TYPE_RT500)); + qdev_connect_clock_in(DEVICE(s), "sysclk", sysclk); + object_property_add_child(OBJECT(ms), "soc", OBJECT(s)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); + + if (ms->kernel_filename) { + armv7m_load_kernel(ARM_CPU(first_cpu), ms->kernel_filename, 0, 0); + } +} + +static void rt595_evk_machine_init(MachineClass *mc) +{ + mc->desc =3D "RT595 EVK Machine (ARM Cortex-M33)"; + mc->init =3D rt595_evk_init; + mc->reset =3D rt595_evk_reset; + + mc->ignore_memory_transaction_failures =3D true; +} + +DEFINE_MACHINE("rt595-evk", rt595_evk_machine_init); diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index d1443e8f89..6720a41f65 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -719,3 +719,8 @@ config RT500 select RT500_CLKCTL select FLEXSPI select RT500_RSTCTL + +config RT595_EVK + bool + default y + select RT500 diff --git a/hw/arm/meson.build b/hw/arm/meson.build index d0be157092..f8c227c633 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -64,6 +64,7 @@ arm_ss.add(when: 'CONFIG_XEN', if_true: files( 'xen-pvh.c', )) arm_ss.add(when: 'CONFIG_RT500', if_true: files('rt500.c')) +arm_ss.add(when: 'CONFIG_RT595_EVK', if_true: files('rt595-evk.c')) =20 system_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c')) system_ss.add(when: 'CONFIG_CHEETAH', if_true: files('palm.c')) --=20 2.46.0.662.g92d0881bb0-goog