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Iglesias" To: qemu-devel@nongnu.org Cc: sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org, peter.maydell@linaro.org, alex.bennee@linaro.org, edgar.iglesias@amd.com, xen-devel@lists.xenproject.org, "Edgar E. Iglesias" Subject: [PATCH v1 3/4] hw/xen: xenpvh: Add pci-intx-irq-base property Date: Mon, 16 Sep 2024 17:08:51 +0200 Message-ID: <20240916150853.1216703-4-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240916150853.1216703-1-edgar.iglesias@gmail.com> References: <20240916150853.1216703-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1726499374055116600 Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Acked-by: Stefano Stabellini --- hw/xen/xen-pvh-common.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c index 76a9b2b945..218ac851cf 100644 --- a/hw/xen/xen-pvh-common.c +++ b/hw/xen/xen-pvh-common.c @@ -218,6 +218,11 @@ static void xen_pvh_init(MachineState *ms) error_report("pci-ecam-size only supports values 0 or 0x100000= 00"); exit(EXIT_FAILURE); } + if (!s->cfg.pci_intx_irq_base) { + error_report("PCI enabled but pci-intx-irq-base not set"); + exit(EXIT_FAILURE); + } + xenpvh_gpex_init(s, xpc, sysmem); } =20 @@ -273,6 +278,30 @@ XEN_PVH_PROP_MEMMAP(pci_ecam) XEN_PVH_PROP_MEMMAP(pci_mmio) XEN_PVH_PROP_MEMMAP(pci_mmio_high) =20 +static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + XenPVHMachineState *xp =3D XEN_PVH_MACHINE(obj); + uint32_t value; + + if (!visit_type_uint32(v, name, &value, errp)) { + return; + } + + xp->cfg.pci_intx_irq_base =3D value; +} + +static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + XenPVHMachineState *xp =3D XEN_PVH_MACHINE(obj); + uint32_t value =3D xp->cfg.pci_intx_irq_base; + + visit_type_uint32(v, name, &value, errp); +} + void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc) { ObjectClass *oc =3D OBJECT_CLASS(xpc); @@ -318,6 +347,13 @@ do { = \ OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam); OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio); OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high); + + object_class_property_add(oc, "pci-intx-irq-base", "uint32_t", + xen_pvh_get_pci_intx_irq_base, + xen_pvh_set_pci_intx_irq_base, + NULL, NULL); + object_class_property_set_description(oc, "pci-intx-irq-base", + "Set PCI INTX interrupt base line."); } =20 #ifdef CONFIG_TPM --=20 2.43.0