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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=pp1; bh=nZ5ZfuY8DqKcZ UIZERfUXcnqAcq5EHxmfo32LBk7SZo=; b=FEGqt8QpmeQxwXB/ajTOeOBN4hEZY 3PjuCSfwUxlyKH9gaHyG4DDdJqT3CpmLTNk9gjIqcU4j5skqq2lETv8XV0dfceAf dGu+MaAcc5A4PC7grHib13bRgECVc2dYZeAUkwcUctwMSQ6m2+7U+2yNYcJiiYp+ HAdOF+l2nezr/rJaiuWnTh4BJ6vunfqk1vT837maqvR7ETiyO1Q0qNeBCWarYaPN SWBy3FfpwnXchtqbnBX5MnXegqW5iEgbGspuHvac85t866o0xC9Zft+yPzFz62Pz C3T930AOIe/i07Ti3eQb8Gpr67C6aKplOPTFUksMuhKUh/sg31/D8+nxQ== From: Ilya Leoshkevich To: Laurent Vivier , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Richard Henderson Cc: qemu-devel@nongnu.org, Ilya Leoshkevich Subject: [PATCH v2 3/5] target/i386/gdbstub: Factor out gdb_get_reg() and gdb_write_reg() Date: Thu, 12 Sep 2024 11:28:22 +0200 Message-ID: <20240912093012.402366-4-iii@linux.ibm.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240912093012.402366-1-iii@linux.ibm.com> References: <20240912093012.402366-1-iii@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: x9vuZVoIRF2VVZ2gzin6UvFCOP4ltjJS X-Proofpoint-ORIG-GUID: 8xR7GoCXNw5aLXBQ_Sqom08AL850ksF0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-12_01,2024-09-09_02,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 adultscore=0 clxscore=1015 mlxlogscore=704 suspectscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409120063 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1726133542640116600 Content-Type: text/plain; charset="utf-8" i386 gdbstub handles both i386 and x86_64. Factor out two functions for reading and writing registers without knowing their bitness. While at it, simplify the TARGET_LONG_BITS =3D=3D 32 case. Reviewed-by: Richard Henderson Signed-off-by: Ilya Leoshkevich --- target/i386/gdbstub.c | 51 +++++++++++++++++++++++++------------------ 1 file changed, 30 insertions(+), 21 deletions(-) diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c index 4acf485879e..cc5eceeb7eb 100644 --- a/target/i386/gdbstub.c +++ b/target/i386/gdbstub.c @@ -96,6 +96,19 @@ static int gdb_write_reg_cs64(uint32_t hflags, uint8_t *= buf, target_ulong *val) return 4; } =20 +static int gdb_get_reg(CPUX86State *env, GByteArray *mem_buf, target_ulong= val) +{ + if (TARGET_LONG_BITS =3D=3D 64) { + if (env->hflags & HF_CS64_MASK) { + return gdb_get_reg64(mem_buf, val); + } else { + return gdb_get_reg64(mem_buf, val & 0xffffffffUL); + } + } else { + return gdb_get_reg32(mem_buf, val); + } +} + int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { X86CPU *cpu =3D X86_CPU(cs); @@ -137,15 +150,7 @@ int x86_cpu_gdb_read_register(CPUState *cs, GByteArray= *mem_buf, int n) } else { switch (n) { case IDX_IP_REG: - if (TARGET_LONG_BITS =3D=3D 64) { - if (env->hflags & HF_CS64_MASK) { - return gdb_get_reg64(mem_buf, env->eip); - } else { - return gdb_get_reg64(mem_buf, env->eip & 0xffffffffUL); - } - } else { - return gdb_get_reg32(mem_buf, env->eip); - } + return gdb_get_reg(env, mem_buf, env->eip); case IDX_FLAGS_REG: return gdb_get_reg32(mem_buf, env->eflags); =20 @@ -248,6 +253,21 @@ static int x86_cpu_gdb_load_seg(X86CPU *cpu, X86Seg sr= eg, uint8_t *mem_buf) return 4; } =20 +static int gdb_write_reg(CPUX86State *env, uint8_t *mem_buf, target_ulong = *val) +{ + if (TARGET_LONG_BITS =3D=3D 64) { + if (env->hflags & HF_CS64_MASK) { + *val =3D ldq_p(mem_buf); + } else { + *val =3D ldq_p(mem_buf) & 0xffffffffUL; + } + return 8; + } else { + *val =3D (uint32_t)ldl_p(mem_buf); + return 4; + } +} + int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { X86CPU *cpu =3D X86_CPU(cs); @@ -288,18 +308,7 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *= mem_buf, int n) } else { switch (n) { case IDX_IP_REG: - if (TARGET_LONG_BITS =3D=3D 64) { - if (env->hflags & HF_CS64_MASK) { - env->eip =3D ldq_p(mem_buf); - } else { - env->eip =3D ldq_p(mem_buf) & 0xffffffffUL; - } - return 8; - } else { - env->eip &=3D ~0xffffffffUL; - env->eip |=3D (uint32_t)ldl_p(mem_buf); - return 4; - } + return gdb_write_reg(env, mem_buf, &env->eip); case IDX_FLAGS_REG: env->eflags =3D ldl_p(mem_buf); return 4; --=20 2.46.0