From nobody Sun Nov 24 06:35:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1726119937; cv=none; d=zohomail.com; s=zohoarc; b=Kl13kvPsCUv+QyDQwKtu8mIJOWqlNL2LcWH+3PjJkZ6qJxQoUZfK5HIK2mA0PzCp7juisuLgVI5RGo/57WRkeFi97hsrLUyf+j7P24+Wtn+4TQajo3ceuoDC+nz2Hg6GL2ryPwm4m2mIklgrO5vcXHtYyyEFKpIihsE9esGMAbE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1726119937; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uuV1qEXFWDTUGqNLxwAHmkJmRuD0mHEgZ+QMPt9fcjE=; b=RvhUYhsqdCEovybc+hwViihzsr0W3r9TtVLRoQ3JSAU0xGWERYItmdXPn3yQ8ZBAYM0NycI0+9SB9z7Z42CsZ1UMSfYqz4VIdkYnnMMuJJMDNInEhkGufgCZqH57KDI+b8ejtFLLUOX+9fRpk8Jicbpbfmsr/gpDM4WffKv/Qu8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17261199373471005.0206391302919; Wed, 11 Sep 2024 22:45:37 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1socPx-0002LV-ML; Thu, 12 Sep 2024 01:30:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1socPp-0001pq-TZ for qemu-devel@nongnu.org; Thu, 12 Sep 2024 01:30:52 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1socPn-00031q-Kv for qemu-devel@nongnu.org; Thu, 12 Sep 2024 01:30:49 -0400 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-20551e2f1f8so5922765ad.2 for ; Wed, 11 Sep 2024 22:30:47 -0700 (PDT) Received: from stoup.. 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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2076afe9e1dsm7513155ad.236.2024.09.11.22.30.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 22:30:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1726119046; x=1726723846; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uuV1qEXFWDTUGqNLxwAHmkJmRuD0mHEgZ+QMPt9fcjE=; b=jGfix3qU/mAbEm5lVrbjWVDJhV6Lxk/nYKxiyZKBzdT/Imh3GiVyE5hatZoaVae9gX ikKBsDlHElAXMItgnAmZOelWWc/7YW3qF2iPkipC+6u43x6e+6ovpJWMYAq0rnHMt7H3 GXc9mGTE3fsovhTnFCsQi3qcqjVkZNzmYsfPGOf9QSmyHRL5McNkJc4Bz4wSiujvdRlJ u4QP2hEy5frD8fwluCMWw6YZsTSPruBrHNTKEcmlJU0mFMtSqA0IrSnAeBfmdUw8QmMv 2JfJG2goCAVvJBR94EpYmgMpcAmaM95E+7lPJfk0kPVkDlYkh+e6OOSHT/RxLx0szO1N vOOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726119046; x=1726723846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uuV1qEXFWDTUGqNLxwAHmkJmRuD0mHEgZ+QMPt9fcjE=; b=WSJ3gFSx79Fhi2kfTNQKOu3zfe6t67OMztUR7aBBXgVhz3Pb3hu65aG0v+sruSZGAb rXp+o9flFto9Ru5NvoNaYiuUNUZ2cqr/JS5auubeTzvnP/KDamYPdaRz0ZctPbwKbTEx 1zgqibXpuo0v3GXt2jczxv5yZCx7iFdbTmNwG9TKF02UrArchQMLY/hJiqqGLOBbV3uc OtgN1IeJVtM3dYnzBj8m+cieId/r2LqPo5qvkNWwWkWwj/LwlzqV+05RnCq7Y2NnaKvp EbIY+qvBe+ldK1+BLQzlEe/f5GDA3ZgdNgrLTfIlTZp9iLBJ6CZjcm2x6cfZh/8oyYBO lt8Q== X-Gm-Message-State: AOJu0YzGhDm0tMpao0WNc22CB+Wj6/zm9RCZ2FIRQm6Xir2V0NA7mOuX NBoVdX5z7iweqkAlTULhgy/fLKdycat0I6W4B94a4gMAznbefzg9eiuGJEGwfxJkAJZeWX3x3Ph 4 X-Google-Smtp-Source: AGHT+IFS0dKDSDhVNMG12D5nLySaDwQh3X/8CcNRsnpNS8Dnmwq0pPGF4LSipjOB6KmpZ2VZPRJ6rw== X-Received: by 2002:a17:902:d4c7:b0:205:5410:5738 with SMTP id d9443c01a7336-2076e3944aamr20199755ad.27.1726119045788; Wed, 11 Sep 2024 22:30:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Carl Hauser , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mark Cave-Ayland Subject: [PULL 1/5] target/sparc: Add FQ and FSR.QNE Date: Wed, 11 Sep 2024 22:30:39 -0700 Message-ID: <20240912053043.1131626-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240912053043.1131626-1-richard.henderson@linaro.org> References: <20240912053043.1131626-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726119938616116600 From: Carl Hauser Add support for, and migrate, a single-entry fp instruction queue for sparc32. Signed-off-by: Carl Hauser [rth: Split from a larger patch; adjust representation with union; add migration state] Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Mark Cave-Ayland Tested-by: Carl Hauser --- target/sparc/cpu.h | 22 ++++++++++++++++++++++ target/sparc/fop_helper.c | 4 ++++ target/sparc/machine.c | 25 +++++++++++++++++++++++++ 3 files changed, 51 insertions(+) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index dfd9512a21..9f2bc44722 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -184,6 +184,8 @@ enum { #define FSR_FTT_SEQ_ERROR (4ULL << 14) #define FSR_FTT_INVAL_FPR (6ULL << 14) =20 +#define FSR_QNE (1ULL << 13) + #define FSR_FCC0_SHIFT 10 #define FSR_FCC1_SHIFT 32 #define FSR_FCC2_SHIFT 34 @@ -438,6 +440,26 @@ struct CPUArchState { uint32_t fsr_cexc_ftt; /* cexc, ftt */ uint32_t fcc[TARGET_FCCREGS]; /* fcc* */ =20 +#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) + /* + * Single-element FPU fault queue, with address and insn, + * packaged into the double-word with which it is stored. + */ + uint32_t fsr_qne; /* qne */ + union { + uint64_t d; + struct { +#if HOST_BIG_ENDIAN + uint32_t addr; + uint32_t insn; +#else + uint32_t insn; + uint32_t addr; +#endif + } s; + } fq; +#endif + CPU_DoubleU fpr[TARGET_DPREGS]; /* floating point registers */ uint32_t cwp; /* index of current register window (extracted from PSR) */ diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c index 0b30665b51..b6692382b3 100644 --- a/target/sparc/fop_helper.c +++ b/target/sparc/fop_helper.c @@ -545,6 +545,8 @@ target_ulong cpu_get_fsr(CPUSPARCState *env) fsr |=3D (uint64_t)env->fcc[1] << FSR_FCC1_SHIFT; fsr |=3D (uint64_t)env->fcc[2] << FSR_FCC2_SHIFT; fsr |=3D (uint64_t)env->fcc[3] << FSR_FCC3_SHIFT; +#elif !defined(CONFIG_USER_ONLY) + fsr |=3D env->fsr_qne; #endif =20 /* VER is kept completely separate until re-assembly. */ @@ -591,6 +593,8 @@ void cpu_put_fsr(CPUSPARCState *env, target_ulong fsr) env->fcc[1] =3D extract64(fsr, FSR_FCC1_SHIFT, 2); env->fcc[2] =3D extract64(fsr, FSR_FCC2_SHIFT, 2); env->fcc[3] =3D extract64(fsr, FSR_FCC3_SHIFT, 2); +#elif !defined(CONFIG_USER_ONLY) + env->fsr_qne =3D fsr & FSR_QNE; #endif =20 set_fsr_nonsplit(env, fsr); diff --git a/target/sparc/machine.c b/target/sparc/machine.c index 48e0cf22f3..222e5709c5 100644 --- a/target/sparc/machine.c +++ b/target/sparc/machine.c @@ -143,6 +143,24 @@ static const VMStateInfo vmstate_xcc =3D { .get =3D get_xcc, .put =3D put_xcc, }; +#else +static bool fq_needed(void *opaque) +{ + SPARCCPU *cpu =3D opaque; + return cpu->env.fsr_qne; +} + +static const VMStateDescription vmstate_fq =3D { + .name =3D "cpu/fq", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D fq_needed, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(env.fq.s.addr, SPARCCPU), + VMSTATE_UINT32(env.fq.s.insn, SPARCCPU), + VMSTATE_END_OF_LIST() + }, +}; #endif =20 static int cpu_pre_save(void *opaque) @@ -265,4 +283,11 @@ const VMStateDescription vmstate_sparc_cpu =3D { #endif VMSTATE_END_OF_LIST() }, +#ifndef TARGET_SPARC64 + .subsections =3D (const VMStateDescription * const []) { + &vmstate_fq, + NULL + }, +#endif + }; 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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2076afe9e1dsm7513155ad.236.2024.09.11.22.30.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 22:30:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1726119047; x=1726723847; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eaeJ4vIVtml8YIdsCzBuc3r44GRxLtYAklX7iK/54rg=; b=RPnO9Y6WVQp+IDb2aOOYIq/38m/QnyITREaZSeVOAKzxK8LcDs31D9mm2pp0ZXbPjG 6ebHfl/ngkEjMTpAGukih+s8fNvHaxp9EFTYhjRgC+xhzEbX1byBDRQTfgyTON9lrn/0 zR/rCf95Id3IVEua9zhBseqxlr6T2M/tINyKD1tVP7sVni889h503Em3nTFgkMoKjPYe v9eJg14YeFa7hYFgrygRyaQq3fuXQSmu+sbRHjERcVWUZK/JwLNhY4hW9X+3s7XmYsmO 6A3258VM9bhN9WGyJsEw2Oh4bQdNajcSVDhe9f9OX0lmBwa/1mjd0AAp+bl9B4Zx8C4a WrQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726119047; x=1726723847; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eaeJ4vIVtml8YIdsCzBuc3r44GRxLtYAklX7iK/54rg=; b=rKVq0g7XoJmbf9F3BdofPDp8zj3v2QP6B7xd1Ez5HtruqhiEpx5+tm2fF8jWoX2Khn jNfmswNnEs5xtSb+42Lnw/x1gie9wa9pVVgTjxsVjFATrqb0VMrVlcgtH189ntt4Qw+3 xNXBDlR/85i37ad05ykus6cOU97F6PXI0IvecCffNcdH6uwabwwIUNmzc1/mtAI8cGb2 nvGkm+jTlYvR3dJXnbwUtRFGW4QkiAHirIQMxmwzxhqY4ejGcH+0lb5iDHMK22HozyyP C/dCCqFYooXpOAb8iTQQQ7lJhPW07Wsrkfak74eJWond4p5WqJsX6NJOzwd7BOVnQUDH EUfw== X-Gm-Message-State: AOJu0Yxq2FJgfvPQMqWgJB9Z0sKOXUzYCLZ9yGKt1NrPm2Mi9m3msU2h JpbHkrDPWht0Qi+6YAwYPCzmPs9yEEvgGyCi7tVfjqnV0jhBcAhmjVL3NKXNli+5MfxORr2ZI/b O X-Google-Smtp-Source: AGHT+IFDyoVjkdrLl/yKyQ8Yo/6A0CMeygj2kLAUG00J5ENRuLr4OWzAy5XCGBDDQsdP+d4PTBoA2w== X-Received: by 2002:a17:902:e545:b0:206:8f25:a4f with SMTP id d9443c01a7336-2074c624134mr106942425ad.16.1726119046784; Wed, 11 Sep 2024 22:30:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Carl Hauser , Mark Cave-Ayland Subject: [PULL 2/5] target/sparc: Populate sparc32 FQ when raising fp exception Date: Wed, 11 Sep 2024 22:30:40 -0700 Message-ID: <20240912053043.1131626-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240912053043.1131626-1-richard.henderson@linaro.org> References: <20240912053043.1131626-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726119896384116600 Content-Type: text/plain; charset="utf-8" From: Carl Hauser Implement a single instruction floating point queue, populated while delivering an fp exception. Signed-off-by: Carl Hauser [rth: Split from a larger patch] Signed-off-by: Richard Henderson Acked-by: Mark Cave-Ayland Tested-by: Carl Hauser --- target/sparc/int32_helper.c | 40 +++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 15 deletions(-) diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index 6b7d65b031..f2dd8bcb2e 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -21,10 +21,10 @@ #include "qemu/main-loop.h" #include "cpu.h" #include "trace.h" +#include "exec/cpu_ldst.h" #include "exec/log.h" #include "sysemu/runstate.h" =20 - static const char * const excp_names[0x80] =3D { [TT_TFAULT] =3D "Instruction Access Fault", [TT_ILL_INSN] =3D "Illegal Instruction", @@ -116,22 +116,9 @@ void sparc_cpu_do_interrupt(CPUState *cs) =20 qemu_log("%6d: %s (v=3D%02x)\n", count, name, intno); log_cpu_state(cs, 0); -#if 0 - { - int i; - uint8_t *ptr; - - qemu_log(" code=3D"); - ptr =3D (uint8_t *)env->pc; - for (i =3D 0; i < 16; i++) { - qemu_log(" %02x", ldub(ptr + i)); - } - qemu_log("\n"); - } -#endif count++; } -#if !defined(CONFIG_USER_ONLY) +#ifndef CONFIG_USER_ONLY if (env->psret =3D=3D 0) { if (cs->exception_index =3D=3D 0x80 && env->def.features & CPU_FEATURE_TA0_SHUTDOWN) { @@ -143,6 +130,29 @@ void sparc_cpu_do_interrupt(CPUState *cs) } return; } + if (intno =3D=3D TT_FP_EXCP) { + /* + * The sparc32 fpu has three states related to exception handling. + * The FPop that signals an exception transitions from fp_execute + * to fp_exception_pending. A subsequent FPop transitions from + * fp_exception_pending to fp_exception, which forces the trap. + * + * If the queue is not empty, this trap is due to execution of an + * illegal FPop while in fp_exception state. Here we are to + * re-enter fp_exception_pending state without queuing the insn. + * + * We do not model the fp_exception_pending state, but instead + * skip directly to fp_exception state. We advance pc/npc to + * mimic delayed trap delivery as if by the subsequent insn. + */ + if (!env->fsr_qne) { + env->fsr_qne =3D FSR_QNE; + env->fq.s.addr =3D env->pc; + env->fq.s.insn =3D cpu_ldl_code(env, env->pc); + } + env->pc =3D env->npc; + env->npc =3D env->npc + 4; + } #endif env->psret =3D 0; cwp =3D cpu_cwp_dec(env, env->cwp - 1); --=20 2.43.0 From nobody Sun Nov 24 06:35:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1726119667; cv=none; d=zohomail.com; s=zohoarc; b=WpPWe+X48vZl7oti5B36gqm1VIRMhActOglnPYwQD0KCI+dRi8FeDVO+esGbNUQ75IKA+DMcsdeW+CJpXuh8Pfu11/FPH9pOPKctv6Lq/5fszY5ppBdiQyDIUqjooDErCTidjJyxIYzIQmrt8AQfLQ44kvBUlXCCU7UzrNd5GDA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1726119667; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=BGVnotTiwj5mkzBWCHImX70kcvKNSfH8JZUj7NW2zwM=; b=Yb0MimKMNB1k+xxrir83ZFoSemCmFNZ4Ces5mdm5uQ+3pYHWWspXAz2KW/yyXJXekPbKqdwY0NtyK0nKxcwkwQNjWDapEi67YrS/sydR36IYUSZWKglRi7gF8dJ0LGqGu8psObTadFUNCd0lTdJMEA8qUEbzrVQ4J0hO79teylc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1726119667074212.1380327135771; Wed, 11 Sep 2024 22:41:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1socPw-0002GE-HK; Thu, 12 Sep 2024 01:30:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1socPr-0001vM-JO for qemu-devel@nongnu.org; Thu, 12 Sep 2024 01:30:52 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1socPp-00032K-IT for qemu-devel@nongnu.org; Thu, 12 Sep 2024 01:30:51 -0400 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-20696938f86so4703295ad.3 for ; Wed, 11 Sep 2024 22:30:48 -0700 (PDT) Received: from stoup.. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726119667507116600 Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Mark Cave-Ayland Tested-by: Carl Hauser --- target/sparc/cpu.h | 8 +++++++- target/sparc/translate.c | 10 +++++++--- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 9f2bc44722..f517e5a383 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -744,6 +744,7 @@ trap_state* cpu_tsptr(CPUSPARCState* env); #define TB_FLAG_AM_ENABLED (1 << 5) #define TB_FLAG_SUPER (1 << 6) #define TB_FLAG_HYPER (1 << 7) +#define TB_FLAG_FSR_QNE (1 << 8) #define TB_FLAG_ASI_SHIFT 24 =20 static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, vaddr *pc, @@ -775,7 +776,12 @@ static inline void cpu_get_tb_cpu_state(CPUSPARCState = *env, vaddr *pc, if (env->psref) { flags |=3D TB_FLAG_FPU_ENABLED; } -#endif +#ifndef CONFIG_USER_ONLY + if (env->fsr_qne) { + flags |=3D TB_FLAG_FSR_QNE; + } +#endif /* !CONFIG_USER_ONLY */ +#endif /* TARGET_SPARC64 */ *pflags =3D flags; } =20 diff --git a/target/sparc/translate.c b/target/sparc/translate.c index c803e8d1ba..eb0158a11d 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -185,6 +185,8 @@ typedef struct DisasContext { bool supervisor; #ifdef TARGET_SPARC64 bool hypervisor; +#else + bool fsr_qne; #endif #endif =20 @@ -5596,13 +5598,15 @@ static void sparc_tr_init_disas_context(DisasContex= tBase *dcbase, CPUState *cs) dc->address_mask_32bit =3D tb_am_enabled(dc->base.tb->flags); #ifndef CONFIG_USER_ONLY dc->supervisor =3D (dc->base.tb->flags & TB_FLAG_SUPER) !=3D 0; +# ifdef TARGET_SPARC64 + dc->hypervisor =3D (dc->base.tb->flags & TB_FLAG_HYPER) !=3D 0; +# else + dc->fsr_qne =3D (dc->base.tb->flags & TB_FLAG_FSR_QNE) !=3D 0; +# endif #endif #ifdef TARGET_SPARC64 dc->fprs_dirty =3D 0; dc->asi =3D (dc->base.tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff; -#ifndef CONFIG_USER_ONLY - dc->hypervisor =3D (dc->base.tb->flags & TB_FLAG_HYPER) !=3D 0; -#endif #endif /* * if we reach a page boundary, we stop generation so that the --=20 2.43.0 From nobody Sun Nov 24 06:35:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1726119141; cv=none; d=zohomail.com; s=zohoarc; b=aM+8B6JMinYivEt5WxqyYplffec54uaA+QrrUKneEApSqrsSeL4NoaVFZ6G7+rUZTg0RMQm1JyvjirpcuUROsIOaF/pC20snw2twwTUknxs0e91/G7jeX8UQnqhp0Ch60QhJ35KVNinihyqt1xd1+h+BRnh1eyCp94GGU7OMxrQ= ARC-Message-Signature: i=1; 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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2076afe9e1dsm7513155ad.236.2024.09.11.22.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 22:30:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1726119049; x=1726723849; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KVGV+7BfoES8Sd+h3N/5t6lr9vkAfRxdpELYtSFMO/M=; b=oKp17mrXMWwa0LA2u3dXS7X7o4NGvpFkJXsabxWFQgkf+3m71rciXENVO9xYPvgElX BTbJsBEQ+3kZzdRyDeJsiUtSNSO4J6hc2O9V1JR3SHITMW9o4O/j2d4Zp9mFsAfGc8YH xxQGCueL1MvTnymtTLHEXsT2VwbgutAVjT6x6QcYKnTBJPPfceb6AhZ6bLTtBSlzvgwn beB8Ho359uHxF8rVB2EZ0l9bwAsxBC4y3VyoJkq/Assci8ZpOUzJcAu15W7gDwrTyu4P 06sOYRIcVYRNN0UvcXXX2veTTbWtR5atJVvcmLiJPp5CzNS5/98xiuSys20rQUN/eGFo +WrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726119049; x=1726723849; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KVGV+7BfoES8Sd+h3N/5t6lr9vkAfRxdpELYtSFMO/M=; b=M7KppRZFVak1kjkSye4a/tz+Rf1iLwtysei8Yl5dHD3ORckcg/8ishd06tOQP+V40s ynLSN11tf3xOoOKo8UwXcoUXkNI+eJw+j+NDc40dIi1fLbn9LwjFKpJMKPtWkpQO8GPY qtxQ2aKk8sMz2DWzrQLtdLrWCqVp/kdxe9xl5sv53U9ua6IB1zWTUH/5unB1by4sHLkF 9/r2FKLMzAtymKWOqBhjlmuc//l9LyEACAogclRRTSr2kRcrKl3Tv+xIMFr52Nf2f9AW Bolh36KaXheuLMoD9EtBVukO3JOWCwdZhdXEchkLq9Q2WnRRRIvJkQkL0pm0pVqFQVOK jpsQ== X-Gm-Message-State: AOJu0Yx5e5IMuN3ZwwmOxelvLRy0ClKUn3tCF0lOY1G3i6ZsyW3R33CY 4F25naW1JnLwNfXrGMfq7uY18UaKA6zYyG0UzRm7aQiL5lYp4EKVqwxPRaGE8dbU5Txyzi8rhND q X-Google-Smtp-Source: AGHT+IEwvKQPFvKndr2I6gw9Fu9P56lM6LetUtCUxfQVvTF6RixyVdz1Yvgm2dWRSxIk7cT3phB6wA== X-Received: by 2002:a17:902:bc82:b0:202:4712:e838 with SMTP id d9443c01a7336-2076e34805fmr19958105ad.14.1726119048850; Wed, 11 Sep 2024 22:30:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Mark Cave-Ayland , Carl Hauser Subject: [PULL 4/5] target/sparc: Implement STDFQ Date: Wed, 11 Sep 2024 22:30:42 -0700 Message-ID: <20240912053043.1131626-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240912053043.1131626-1-richard.henderson@linaro.org> References: <20240912053043.1131626-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726119142562116600 Content-Type: text/plain; charset="utf-8" Invalid encoding of addr should raise TT_ILL_INSN, so check before supervisor, which might raise TT_PRIV_INSN. Clear QNE after execution. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2340 Signed-off-by: Richard Henderson Acked-by: Mark Cave-Ayland Tested-by: Carl Hauser --- target/sparc/translate.c | 28 ++++++++++++++++++++++++++-- target/sparc/insns.decode | 2 +- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index eb0158a11d..b80f071533 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -4531,17 +4531,41 @@ TRANS(STQFA, 64, do_st_fpr, a, MO_128) =20 static bool trans_STDFQ(DisasContext *dc, arg_STDFQ *a) { + TCGv addr; + if (!avail_32(dc)) { return false; } + addr =3D gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); + if (addr =3D=3D NULL) { + return false; + } if (!supervisor(dc)) { return raise_priv(dc); } +#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) if (gen_trap_ifnofpu(dc)) { return true; } - gen_op_fpexception_im(dc, FSR_FTT_SEQ_ERROR); - return true; + if (!dc->fsr_qne) { + gen_op_fpexception_im(dc, FSR_FTT_SEQ_ERROR); + return true; + } + + /* Store the single element from the queue. */ + TCGv_i64 fq =3D tcg_temp_new_i64(); + tcg_gen_ld_i64(fq, tcg_env, offsetof(CPUSPARCState, fq.d)); + tcg_gen_qemu_st_i64(fq, addr, dc->mem_idx, MO_TEUQ | MO_ALIGN_4); + + /* Mark the queue empty, transitioning to fp_execute state. */ + tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, + offsetof(CPUSPARCState, fsr_qne)); + dc->fsr_qne =3D 0; + + return advance_pc(dc); +#else + qemu_build_not_reached(); +#endif } =20 static bool trans_LDFSR(DisasContext *dc, arg_r_r_ri *a) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 5fd478191a..923f348580 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -645,7 +645,7 @@ STFSR 11 00000 100101 ..... . ............. = @n_r_ri STXFSR 11 00001 100101 ..... . ............. @n_r_ri { STQF 11 ..... 100110 ..... . ............. @q_r_ri_na # v9 - STDFQ 11 ----- 100110 ----- - ------------- + STDFQ 11 ..... 100110 ..... . ............. @r_r_ri # v7= ,v8 } STDF 11 ..... 100111 ..... . ............. @d_r_ri_na =20 --=20 2.43.0 From nobody Sun Nov 24 06:35:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1726119786; cv=none; d=zohomail.com; s=zohoarc; b=X3XGIVkO58+Hz/gx+aH20kit5UEVz3kSX9qDl+Gpxor5OaeKqi1OU9d2wdQF3yv/QeSMdII6kC0Ry4asJquWwHdqN1s0vscdZ8UloZGSZxj5FND5t0fUXNJSU517YS8t+ZxP003xVZM9edhxnC4PCcXWOUkzwDv/kfFTre2ZQHM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1726119786; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=gyCgL5sYQmLP8iWekZZGySR80jy81UllqXHME1HXjT0=; b=BOAw/rix1GLUEUIQ4D0HYcnXAjQ3mvY20izhACylCurfaTFDlL2R98oxr9Fssku2YUPCYSPeIRca6z0CQ9yliy09CGjsUcmzczw2XrfDRRLbKeSsn9Tm9OyEVk1cawDUScRk6pC/Zif6vssxlyLqtscHVRZvJkG8h/J0ORiUcXY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1726119786456496.41165573975013; Wed, 11 Sep 2024 22:43:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1socPy-0002O9-AP; Thu, 12 Sep 2024 01:30:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1socPu-00024s-2X for qemu-devel@nongnu.org; Thu, 12 Sep 2024 01:30:54 -0400 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1socPr-00032r-SV for qemu-devel@nongnu.org; Thu, 12 Sep 2024 01:30:53 -0400 Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-2053a0bd0a6so6323025ad.3 for ; Wed, 11 Sep 2024 22:30:51 -0700 (PDT) Received: from stoup.. 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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2076afe9e1dsm7513155ad.236.2024.09.11.22.30.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 22:30:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1726119050; x=1726723850; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gyCgL5sYQmLP8iWekZZGySR80jy81UllqXHME1HXjT0=; b=AR5QqS4qRv9N1tKCSruXkGRUDfr6cKbnT44cvOvLmqbAea+j8+38mWysh/iCNmeWzv fYDMshqwoBbd9FX3UITyK72QLl8phF4Gx5fWg5G9fNawucl1jgWEmBUYeVpizZw6hbui NpqPH0Vg5dGyqcSNkbC5MoUA7/I7Rd4B9do4OAXK6Xx6wUGSbvsrymR/GrpxSw9hOeNk n4HKlxGOYOOvhWI35h8kimxVos+bqAtvJzgPWEMaEOHmKnSj0GrcK+CWWClVMCxXL/jz ImorBJnzDQEsSo5qUasIYh0wvitWs7s2A1HDaKfvXv/AuEnJTERMhhk8lGp9V3JUUK2+ G7zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726119050; x=1726723850; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gyCgL5sYQmLP8iWekZZGySR80jy81UllqXHME1HXjT0=; b=d6Dr+U9brgyCme5eP04ZfkXu2sAsayKT07iW4a9uG/LGz8sHTRqs1AFUYqu7sBoPh6 N+X4A7iXeQUN6eK+zoubQM1KSOQdwdoThuB3RQHj0dwJBXw6ZCK9/dH6CKwhFuM0rm+v 7cbyg+iDSPLaX9neRgzn+PzqlTqKekTg/XSE4rFXGy50mAk4xAs/DNl3DHl/v4hEzD8O IHN903LYhhUWgopi2SAmcbdDiy8PTZY/5D05u9AtBTH/v2Z+UM9WY1k/pAoqczymu6sZ fCIADDz9l0BDXxAkfeTMJzn/GVFUIr/x9HuJA+coKSlvQ4horiR2KlNKHAuO9TZ0oOF/ BKew== X-Gm-Message-State: AOJu0YzWD4Ww0qhgaalN8Q0GuIJPGB2OvPi6gR808Gk4wZPWOpm1Qkkx jx11J6U6pdwfTcUrQKP5Tpm6iuIs/uA7tNAmqGczJVrTpzehhRoPMSQfR35xVGLfAnEZM5eQ4Dm o X-Google-Smtp-Source: AGHT+IHL2QeP5x+A7xtt/7tOaIU3jt924OoNoaaZ170oHDZF2Si+dUDff9kJv4V3BMFPOoeGdFIu/A== X-Received: by 2002:a17:902:e5c5:b0:1fc:6cf5:df4b with SMTP id d9443c01a7336-2076e428114mr23385465ad.49.1726119050015; Wed, 11 Sep 2024 22:30:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Mark Cave-Ayland , Carl Hauser Subject: [PULL 5/5] target/sparc: Add gen_trap_if_nofpu_fpexception Date: Wed, 11 Sep 2024 22:30:43 -0700 Message-ID: <20240912053043.1131626-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240912053043.1131626-1-richard.henderson@linaro.org> References: <20240912053043.1131626-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726119788021116600 Content-Type: text/plain; charset="utf-8" Model fp_exception state, in which only fp stores are allowed until such time as the FQ has been flushed. Signed-off-by: Richard Henderson Acked-by: Mark Cave-Ayland Tested-by: Carl Hauser --- target/sparc/translate.c | 90 +++++++++++++++++++++++++++------------- 1 file changed, 61 insertions(+), 29 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index b80f071533..cdd0a95c03 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -1465,15 +1465,48 @@ static void gen_op_fpexception_im(DisasContext *dc,= int ftt) gen_exception(dc, TT_FP_EXCP); } =20 -static int gen_trap_ifnofpu(DisasContext *dc) +static bool gen_trap_ifnofpu(DisasContext *dc) { #if !defined(CONFIG_USER_ONLY) if (!dc->fpu_enabled) { gen_exception(dc, TT_NFPU_INSN); - return 1; + return true; } #endif - return 0; + return false; +} + +static bool gen_trap_iffpexception(DisasContext *dc) +{ +#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) + /* + * There are 3 states for the sparc32 fpu: + * Normally the fpu is in fp_execute, and all insns are allowed. + * When an exception is signaled, it moves to fp_exception_pending sta= te. + * Upon seeing the next FPop, the fpu moves to fp_exception state, + * populates the FQ, and generates an fp_exception trap. + * The fpu remains in fp_exception state until FQ becomes empty + * after execution of a STDFQ instruction. While the fpu is in + * fp_exception state, and FPop, fp load or fp branch insn will + * return to fp_exception_pending state, set FSR.FTT to sequence_error, + * and the insn will not be entered into the FQ. + * + * In QEMU, we do not model the fp_exception_pending state and + * instead populate FQ and raise the exception immediately. + * But we can still honor fp_exception state by noticing when + * the FQ is not empty. + */ + if (dc->fsr_qne) { + gen_op_fpexception_im(dc, FSR_FTT_SEQ_ERROR); + return true; + } +#endif + return false; +} + +static bool gen_trap_if_nofpu_fpexception(DisasContext *dc) +{ + return gen_trap_ifnofpu(dc) || gen_trap_iffpexception(dc); } =20 /* asi moves */ @@ -2643,7 +2676,7 @@ static bool do_fbpfcc(DisasContext *dc, arg_bcc *a) { DisasCompare cmp; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } gen_fcompare(&cmp, a->cc, a->cond); @@ -4482,7 +4515,7 @@ static bool do_ld_fpr(DisasContext *dc, arg_r_r_ri_as= i *a, MemOp sz) if (addr =3D=3D NULL) { return false; } - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (sz =3D=3D MO_128 && gen_trap_float128(dc)) { @@ -4510,6 +4543,7 @@ static bool do_st_fpr(DisasContext *dc, arg_r_r_ri_as= i *a, MemOp sz) if (addr =3D=3D NULL) { return false; } + /* Store insns are ok in fp_exception_pending state. */ if (gen_trap_ifnofpu(dc)) { return true; } @@ -4576,7 +4610,7 @@ static bool trans_LDFSR(DisasContext *dc, arg_r_r_ri = *a) if (addr =3D=3D NULL) { return false; } - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4600,7 +4634,7 @@ static bool do_ldxfsr(DisasContext *dc, arg_r_r_ri *a= , bool entire) if (addr =3D=3D NULL) { return false; } - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4637,6 +4671,7 @@ static bool do_stfsr(DisasContext *dc, arg_r_r_ri *a,= MemOp mop) if (addr =3D=3D NULL) { return false; } + /* Store insns are ok in fp_exception_pending state. */ if (gen_trap_ifnofpu(dc)) { return true; } @@ -4679,7 +4714,7 @@ static bool do_ff(DisasContext *dc, arg_r_r *a, { TCGv_i32 tmp; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4720,7 +4755,7 @@ static bool do_env_ff(DisasContext *dc, arg_r_r *a, { TCGv_i32 tmp; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4740,7 +4775,7 @@ static bool do_env_fd(DisasContext *dc, arg_r_r *a, TCGv_i32 dst; TCGv_i64 src; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4760,7 +4795,7 @@ static bool do_dd(DisasContext *dc, arg_r_r *a, { TCGv_i64 dst, src; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4782,7 +4817,7 @@ static bool do_env_dd(DisasContext *dc, arg_r_r *a, { TCGv_i64 dst, src; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4822,7 +4857,7 @@ static bool do_env_df(DisasContext *dc, arg_r_r *a, TCGv_i64 dst; TCGv_i32 src; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -4865,7 +4900,7 @@ static bool do_env_qq(DisasContext *dc, arg_r_r *a, { TCGv_i128 t; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { @@ -4886,7 +4921,7 @@ static bool do_env_fq(DisasContext *dc, arg_r_r *a, TCGv_i128 src; TCGv_i32 dst; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { @@ -4909,7 +4944,7 @@ static bool do_env_dq(DisasContext *dc, arg_r_r *a, TCGv_i128 src; TCGv_i64 dst; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { @@ -4932,7 +4967,7 @@ static bool do_env_qf(DisasContext *dc, arg_r_r *a, TCGv_i32 src; TCGv_i128 dst; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { @@ -4955,10 +4990,7 @@ static bool do_env_qd(DisasContext *dc, arg_r_r *a, TCGv_i64 src; TCGv_i128 dst; =20 - if (gen_trap_ifnofpu(dc)) { - return true; - } - if (gen_trap_float128(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -5015,7 +5047,7 @@ static bool do_env_fff(DisasContext *dc, arg_r_r_r *a, { TCGv_i32 src1, src2; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -5224,7 +5256,7 @@ static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a, { TCGv_i64 dst, src1, src2; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -5248,7 +5280,7 @@ static bool trans_FsMULd(DisasContext *dc, arg_r_r_r = *a) TCGv_i64 dst; TCGv_i32 src1, src2; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (!(dc->def->features & CPU_FEATURE_FSMULD)) { @@ -5357,7 +5389,7 @@ static bool do_env_qqq(DisasContext *dc, arg_r_r_r *a, { TCGv_i128 src1, src2; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { @@ -5381,7 +5413,7 @@ static bool trans_FdMULq(DisasContext *dc, arg_r_r_r = *a) TCGv_i64 src1, src2; TCGv_i128 dst; =20 - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { @@ -5471,7 +5503,7 @@ static bool do_fcmps(DisasContext *dc, arg_FCMPs *a, = bool e) if (avail_32(dc) && a->cc !=3D 0) { return false; } - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -5495,7 +5527,7 @@ static bool do_fcmpd(DisasContext *dc, arg_FCMPd *a, = bool e) if (avail_32(dc) && a->cc !=3D 0) { return false; } - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } =20 @@ -5519,7 +5551,7 @@ static bool do_fcmpq(DisasContext *dc, arg_FCMPq *a, = bool e) if (avail_32(dc) && a->cc !=3D 0) { return false; } - if (gen_trap_ifnofpu(dc)) { + if (gen_trap_if_nofpu_fpexception(dc)) { return true; } if (gen_trap_float128(dc)) { --=20 2.43.0