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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71908fc8fdesm3833034b3a.1.2024.09.11.22.30.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 22:30:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726119022; x=1726723822; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xl2u8VSlAsDXatryQRsLfhflFKGJFdFrYq4cRLhSKls=; b=GciZP3ue3ve8iLqrOTH8D1bA0YFTY/H+C35eTMMtCJrYj7v0r2Izih/2D9/Yikmw16 vRopy2LOZqQ49/gR5Io57TuFzCeP6vmm1DlN1qqf671Q+k75GKQWzxJ/PquSU92Ow9D6 lUDkfCRmtpDysnrtIltnkGfA/cWec+Xuz6qpuuawtMdmr9hBZD8vXZp8bBlsoJXryuU8 zm2yM8d3xLS4ijOLT0eMSa/CbOEFz6HUuQ+NHTOPC1MlwnfFJIESbtKQUaGOqtzlZNkj lS0665NAid4mZstxnVnHyJFxO2AJvuk4BALYiLfr/gDQdTi25N2rA5ojSIByaT0WlXHu w5rA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726119022; x=1726723822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xl2u8VSlAsDXatryQRsLfhflFKGJFdFrYq4cRLhSKls=; b=ZbAEdmMZQ6sApbCoawbGr9bXRBZ3FaWSBUhTBu9IkE0lFW2/DFVev8NwrnIb+UTCUi kdSh08Hhqwhv5CPQXxw3nVr7ryahlfCbva/EgZObGrTusZWNTuJxTpg4FtqEh0cSRN5P gWqbCIGM+hSSavoFWLMK5Y5dzuiAFtmS2rA9dqNMhLra7LCoR9zqBhC5slS50eEzWTfa VzdviJEu4/MiuP8TZXFUIlKL/eBulMuzIMfBivvh/xQ7wDR38yIxfBYklT619ep4TtEQ amEpSROkylqKcm5DWzv+mH6gNrOj/V3mTnQSn9eID28xuokjFr6HnPMi5unj8/TYx8Jh +3KQ== X-Gm-Message-State: AOJu0YzVAMSzXgkMFjtOPKtgn2FCLk3jrgQB+HJWPfuo36lHXDbunwf8 v7dgKmGDQNg5Rj2uG7lwA6mv8T3eYl7VwbSdZX95mEMAvsFaUWwfZdqGow== X-Google-Smtp-Source: AGHT+IFO2Kb3C6kauazbiL2J/6MLPd4fk7ySnx++j35LzCP4/rGP+jzuuR1/CJY6/cVwxp9ju3DHfA== X-Received: by 2002:a05:6a21:3305:b0:1cf:3996:744e with SMTP id adf61e73a8af0-1cf761e559cmr2048548637.39.1726119021323; Wed, 11 Sep 2024 22:30:21 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Alistair Francis , Daniel Henrique Barboza Subject: [PULL 07/47] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU Date: Thu, 12 Sep 2024 15:29:12 +1000 Message-ID: <20240912052953.2552501-8-alistair.francis@wdc.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240912052953.2552501-1-alistair.francis@wdc.com> References: <20240912052953.2552501-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=alistair23@gmail.com; helo=mail-pf1-x42c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1726119246757116600 Content-Type: text/plain; charset="utf-8" From: Alistair Francis The OpenTitan Ibex CPU now supports the the Zba, Zbb, Zbc and Zbs bit-manipulation sub-extensions ratified in v.1.0.0 of the RISC-V Bit- Manipulation ISA Extension, so let's enable them in QEMU as well. 1: https://github.com/lowRISC/opentitan/pull/9748 Signed-off-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20240823003231.3522113-1-alistair.francis@wdc.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f93bf9c221..fc3f75e826 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -701,6 +701,11 @@ static void rv32_ibex_cpu_init(Object *obj) cpu->cfg.ext_zicsr =3D true; cpu->cfg.pmp =3D true; cpu->cfg.ext_smepmp =3D true; + + cpu->cfg.ext_zba =3D true; + cpu->cfg.ext_zbb =3D true; + cpu->cfg.ext_zbc =3D true; + cpu->cfg.ext_zbs =3D true; } =20 static void rv32_imafcu_nommu_cpu_init(Object *obj) --=20 2.46.0