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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71908fc8fdesm3833034b3a.1.2024.09.11.22.30.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 22:30:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726119053; x=1726723853; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YbZqF++ZhMtcJDIF2/NlKZuD8jEV76FLyT7OsIr+hLI=; b=MBla3g1hGX+Hqp8tnTAu2XBAVYzKnh2vpP9u7iWpYN19EEqAs26izWm7Ols7AIkpeN aG6oWo8MsJy5GpcG1PamASCr9Vojp4QFXQlUF6EvSvMAmecbBy0IG/UHYfCswNqxzxBY XWLROiCEjYSwaVyl2pRpSumIKS9queihYN/j1tgfOyUC9pOJyymgdfxfTgsvpDajhSB8 x4sA5TKo4dNoL4zaAhMEIIZve5x6kTCI3+T3pJQbOAawTZbBllvcXqMTvt1Y/kFKzqDA UadDYqrlwjEx/nl/qScJeC+F+W7NGwi3wDV13h59JExIhwssSzlfIkhXz3dc+B19oAqo VGLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726119053; x=1726723853; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YbZqF++ZhMtcJDIF2/NlKZuD8jEV76FLyT7OsIr+hLI=; b=aKonrkjPZuXLIRYEtVMuYjefi/ilWYPhs48DZhQ319HT2UmHcrJ+LbXiVih0mCxNCU ur5b1dPcNRCWZvZINWCjNGt91Cagx/qFDWpsZgDY4549hiFdcNiyxygbfC8c1xZXMwgY ujfLIPocYemnO/DPRn//wKz5NFV/TJp01rGPtE74VLtkaSSldyLSFBlLSCrwlI+frc4v 1q7Vedjv8wGR94xSrjiF8IS6gLE3sRswTPq5snSnuz+l4a0Jg8PtytSfYBG8vLqvIaaL SPyseDS0wYEA/rZs56xi3RxzClsftwQqJfRsnBjBr2MFQQEyFijHi1LqFQftXzik3wsW KRjA== X-Gm-Message-State: AOJu0Yx4Ax0zPUPap8wORj3gyulYZcGokFW19mQtlT9huOsZTGWZRokO iRdlEveJpCW3b6dST8ICQe6q0s/AaY+acqNRU28JQIAOZrKffj8vzdIu5g== X-Google-Smtp-Source: AGHT+IHcWfo7Ib/qebmo2el2FLgk2tKIMEkpmiqAaKFM3ItvbYl1aiFIkUgovc8jiOgrJlO/g7heuw== X-Received: by 2002:a05:6a00:194b:b0:704:151d:dcce with SMTP id d2e1a72fcca58-719263cb4e2mr2662724b3a.5.1726119052670; Wed, 11 Sep 2024 22:30:52 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Gerd Hoffmann , Frank Chang , Alistair Francis Subject: [PULL 17/47] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device Date: Thu, 12 Sep 2024 15:29:22 +1000 Message-ID: <20240912052953.2552501-18-alistair.francis@wdc.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240912052953.2552501-1-alistair.francis@wdc.com> References: <20240912052953.2552501-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=alistair23@gmail.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1726119128398116600 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza The RISC-V IOMMU PCI device we're going to add next is a reference implementation of the riscv-iommu spec [1], which predicts that the IOMMU can be implemented as a PCIe device. However, RISC-V International (RVI), the entity that ratified the riscv-iommu spec, didn't bother assigning a PCI ID for this IOMMU PCIe implementation that the spec predicts. This puts us in an uncommon situation because we want to add the reference IOMMU PCIe implementation but we don't have a PCI ID for it. Given that RVI doesn't provide a PCI ID for it we reached out to Red Hat and Gerd Hoffman, and they were kind enough to give us a PCI ID for the RISC-V IOMMU PCI reference device. Thanks Red Hat and Gerd for this RISC-V IOMMU PCIe device ID. [1] https://github.com/riscv-non-isa/riscv-iommu/releases/tag/v1.0.0 Cc: Gerd Hoffmann Signed-off-by: Daniel Henrique Barboza Reviewed-by: Frank Chang Reviewed-by: Gerd Hoffmann Message-ID: <20240903201633.93182-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis --- docs/specs/pci-ids.rst | 2 ++ include/hw/pci/pci.h | 1 + 2 files changed, 3 insertions(+) diff --git a/docs/specs/pci-ids.rst b/docs/specs/pci-ids.rst index 328ab31fe8..261b0f359f 100644 --- a/docs/specs/pci-ids.rst +++ b/docs/specs/pci-ids.rst @@ -98,6 +98,8 @@ PCI devices (other than virtio): PCI ACPI ERST device (``-device acpi-erst``) 1b36:0013 PCI UFS device (``-device ufs``) +1b36:0014 + PCI RISC-V IOMMU device =20 All these devices are documented in :doc:`index`. =20 diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index eb26cac810..35d4fe0bbf 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -116,6 +116,7 @@ extern bool pci_available; #define PCI_DEVICE_ID_REDHAT_PVPANIC 0x0011 #define PCI_DEVICE_ID_REDHAT_ACPI_ERST 0x0012 #define PCI_DEVICE_ID_REDHAT_UFS 0x0013 +#define PCI_DEVICE_ID_REDHAT_RISCV_IOMMU 0x0014 #define PCI_DEVICE_ID_REDHAT_QXL 0x0100 =20 #define FMT_PCIBUS PRIx64 --=20 2.46.0