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Tue, 10 Sep 2024 23:46:54 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Gustavo Romero , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Peter Maydell , qemu-arm@nongnu.org (open list:ARM TCG CPUs) Subject: [PULL 06/10] gdbstub: Use specific MMU index when probing MTE addresses Date: Wed, 11 Sep 2024 07:46:41 +0100 Message-Id: <20240911064645.357592-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240911064645.357592-1-alex.bennee@linaro.org> References: <20240911064645.357592-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1726037317018116600 From: Gustavo Romero Use cpu_mmu_index() to determine the specific translation regime (MMU index) before probing addresses using allocation_tag_mem_probe(). Currently, the MMU index is hardcoded to 0 and only works for user mode. By obtaining the specific MMU index according to the translation regime, future use of the stubs relying on allocation_tag_mem_probe in other regimes will be possible, like in EL1. This commit also changes the ptr_size value passed to allocation_tag_mem_probe() from 8 to 1. The ptr_size parameter actually represents the number of bytes in the memory access (which can be as small as 1 byte), rather than the number of bits used in the address space pointed to by ptr. Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson Message-Id: <20240906143316.657436-2-gustavo.romero@linaro.org> Signed-off-by: Alex Benn=C3=A9e Message-Id: <20240910173900.4154726-7-alex.bennee@linaro.org> diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 5221381cc8..85a19c14c7 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -435,6 +435,7 @@ static void handle_q_memtag(GArray *params, void *user_= ctx) { ARMCPU *cpu =3D ARM_CPU(user_ctx); CPUARMState *env =3D &cpu->env; + uint32_t mmu_index; =20 uint64_t addr =3D gdb_get_cmd_param(params, 0)->val_ull; uint64_t len =3D gdb_get_cmd_param(params, 1)->val_ul; @@ -458,8 +459,10 @@ static void handle_q_memtag(GArray *params, void *user= _ctx) gdb_put_packet("E03"); } =20 + /* Find out the current translation regime for probe. */ + mmu_index =3D cpu_mmu_index(env_cpu(env), false); /* Note that tags are packed here (2 tags packed in one byte). */ - tags =3D allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64= -bit */, + tags =3D allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD,= 1, MMU_DATA_LOAD, true, 0); if (!tags) { /* Address is not in a tagged region. */ @@ -478,13 +481,16 @@ static void handle_q_isaddresstagged(GArray *params, = void *user_ctx) { ARMCPU *cpu =3D ARM_CPU(user_ctx); CPUARMState *env =3D &cpu->env; + uint32_t mmu_index; =20 uint64_t addr =3D gdb_get_cmd_param(params, 0)->val_ull; =20 uint8_t *tags; const char *reply; =20 - tags =3D allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64= -bit */, + /* Find out the current translation regime for probe. */ + mmu_index =3D cpu_mmu_index(env_cpu(env), false); + tags =3D allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD,= 1, MMU_DATA_LOAD, true, 0); reply =3D tags ? "01" : "00"; =20 @@ -495,6 +501,7 @@ static void handle_Q_memtag(GArray *params, void *user_= ctx) { ARMCPU *cpu =3D ARM_CPU(user_ctx); CPUARMState *env =3D &cpu->env; + uint32_t mmu_index; =20 uint64_t start_addr =3D gdb_get_cmd_param(params, 0)->val_ull; uint64_t len =3D gdb_get_cmd_param(params, 1)->val_ul; @@ -527,8 +534,10 @@ static void handle_Q_memtag(GArray *params, void *user= _ctx) * Get all tags in the page starting from the tag of the start address. * Note that there are two tags packed into a single byte here. */ - tags =3D allocation_tag_mem_probe(env, 0, start_addr, MMU_DATA_STORE, - 8 /* 64-bit */, MMU_DATA_STORE, true, = 0); + /* Find out the current translation regime for probe. */ + mmu_index =3D cpu_mmu_index(env_cpu(env), false); + tags =3D allocation_tag_mem_probe(env, mmu_index, start_addr, MMU_DATA= _STORE, + 1, MMU_DATA_STORE, true, 0); if (!tags) { /* Address is not in a tagged region. */ gdb_put_packet("E04"); --=20 2.39.2