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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20710f35d79sm35753305ad.288.2024.09.09.09.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Sep 2024 09:22:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1725898969; x=1726503769; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GWjrw04iELmAczfBPyWyqBTlFr8LUX7vWfkc1TSxNTY=; b=YD3Tbsa7uCGX/CpiyTNNO9U98+cWuuDOXSNPTu9vRcQMVfuLS5HX86rq6BnaH9rPg1 Crd4/HFt92kGPhWug4hL9pcE2SKDpWqgcnpOVLNPnmKz8aqfFMI8i54LsE2f50rF10ck AuKhTAjbE9fyS3sVACxHv3oHS1tewjLqMuPSZDKNDyNBxh4dLz8DPg9lCtwk4KTZKfV+ QLtpGjf+zmFfPjrrmzHWrbVMJrdoNsb6OeWuDHyVC9L5AVMJtVdDrioHSi4OgU75TE6a apvg0zmioxld3Df0nNadRGLqq61t3GXxGvhxSxwHZ5HkGEbtSTjn5nwqUwKpHsQH0KPX aHhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725898969; x=1726503769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GWjrw04iELmAczfBPyWyqBTlFr8LUX7vWfkc1TSxNTY=; b=YTYH009HGJ3sJqdZCrKLdjG31v23/72s6qgsX30+KJeI+epopWQdgtTDVZzSZ5SOtS ksDgoiXvalCz82pOf40nudI3N7ady0H4nbtGlUqQGqEYnHUlC/BiqShlImjWZR69bzy2 8FzT1nl2ayLbXUnn8jz7d+RW1QfLWqVhHb6h9hLlNRhYGEiquFpfXY34nL49QvmSn6Sv /inktxC8Fu+Ft/vm3udC8ZukujrYADGw2GX/rPe98ETZx3JTLjblwuO5GaP/ao72OnLt AQefyOygZQYfIu/h0z/aRew9dSbngE6WHLtyUQ+nv9dNMailAojWGXq40g8giRFhnrLr y95g== X-Gm-Message-State: AOJu0YzJeLn8SFjkxAmgjFo0zUFxzTRHGimcNERLCe5b6DvpBm9e7vpm oxTjXJzVmQM4A9hg8PK2eIcXHVuw6U1gkwWdsxqZWEDSgCZ5SV8NakZjIeDX1n5/4Q6ud8hGB4o K X-Google-Smtp-Source: AGHT+IHsizqFdEWuZWExeyeTyD1OUcMD2h+/K/DrhKPNUS+a95bpkC3mkCLGxufCQ2yQImjPxB+9Tg== X-Received: by 2002:a17:903:1211:b0:207:14e9:eb22 with SMTP id d9443c01a7336-20714e9eb35mr107820135ad.6.1725898968888; Mon, 09 Sep 2024 09:22:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell Subject: [PATCH v2 07/29] target/arm: Convert TBL, TBX to decodetree Date: Mon, 9 Sep 2024 09:22:17 -0700 Message-ID: <20240909162240.647173-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240909162240.647173-1-richard.henderson@linaro.org> References: <20240909162240.647173-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1725899311408116600 Content-Type: text/plain; charset="utf-8" Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 47 ++++++++++------------------------ target/arm/tcg/a64.decode | 4 +++ 2 files changed, 18 insertions(+), 33 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 48188d4116..70173c67c2 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -4680,6 +4680,20 @@ static bool trans_EXTR(DisasContext *s, arg_extract = *a) return true; } =20 +static bool trans_TBL_TBX(DisasContext *s, arg_TBL_TBX *a) +{ + if (fp_access_check(s)) { + int len =3D (a->len + 1) * 16; + + tcg_gen_gvec_2_ptr(vec_full_reg_offset(s, a->rd), + vec_full_reg_offset(s, a->rm), tcg_env, + a->q ? 16 : 8, vec_full_reg_size(s), + (len << 6) | (a->tbx << 5) | a->rn, + gen_helper_simd_tblx); + } + return true; +} + /* * Cryptographic AES, SHA, SHA512 */ @@ -8938,38 +8952,6 @@ static void disas_data_proc_fp(DisasContext *s, uint= 32_t insn) } } =20 -/* TBL/TBX - * 31 30 29 24 23 22 21 20 16 15 14 13 12 11 10 9 5 4 = 0 - * +---+---+-------------+-----+---+------+---+-----+----+-----+------+---= ---+ - * | 0 | Q | 0 0 1 1 1 0 | op2 | 0 | Rm | 0 | len | op | 0 0 | Rn | R= d | - * +---+---+-------------+-----+---+------+---+-----+----+-----+------+---= ---+ - */ -static void disas_simd_tb(DisasContext *s, uint32_t insn) -{ - int op2 =3D extract32(insn, 22, 2); - int is_q =3D extract32(insn, 30, 1); - int rm =3D extract32(insn, 16, 5); - int rn =3D extract32(insn, 5, 5); - int rd =3D extract32(insn, 0, 5); - int is_tbx =3D extract32(insn, 12, 1); - int len =3D (extract32(insn, 13, 2) + 1) * 16; - - if (op2 !=3D 0) { - unallocated_encoding(s); - return; - } - - if (!fp_access_check(s)) { - return; - } - - tcg_gen_gvec_2_ptr(vec_full_reg_offset(s, rd), - vec_full_reg_offset(s, rm), tcg_env, - is_q ? 16 : 8, vec_full_reg_size(s), - (len << 6) | (is_tbx << 5) | rn, - gen_helper_simd_tblx); -} - /* ZIP/UZP/TRN * 31 30 29 24 23 22 21 20 16 15 14 12 11 10 9 5 4 0 * +---+---+-------------+------+---+------+---+------------------+------+ @@ -11834,7 +11816,6 @@ static const AArch64DecodeTable data_proc_simd[] = =3D { /* simd_mod_imm decode is a subset of simd_shift_imm, so must precede = it */ { 0x0f000400, 0x9ff80400, disas_simd_mod_imm }, { 0x0f000400, 0x9f800400, disas_simd_shift_imm }, - { 0x0e000000, 0xbf208c00, disas_simd_tb }, { 0x0e000800, 0xbf208c00, disas_simd_zip_trn }, { 0x5e200800, 0xdf3e0c00, disas_simd_scalar_two_reg_misc }, { 0x5f000400, 0xdf800400, disas_simd_scalar_shift_imm }, diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode index f72f95865f..e2a3ef62ef 100644 --- a/target/arm/tcg/a64.decode +++ b/target/arm/tcg/a64.decode @@ -1141,3 +1141,7 @@ FNMSUB 0001 1111 .. 1 ..... 1 ..... ..... ..= ... @rrrr_hsd =20 EXT_d 0010 1110 00 0 rm:5 00 imm:3 0 rn:5 rd:5 EXT_q 0110 1110 00 0 rm:5 0 imm:4 0 rn:5 rd:5 + +# Advanced SIMD Table Lookup + +TBL_TBX 0 q:1 00 1110 000 rm:5 0 len:2 tbx:1 00 rn:5 rd:5 --=20 2.43.0