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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20710f35d79sm35753305ad.288.2024.09.09.09.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Sep 2024 09:22:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1725898970; x=1726503770; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=htF5qh+BwrQAazett+74anTVYDcrx88zDGCrAO2eD7Q=; b=VQ0t9OUgc/t7WEnf0JG5m7Tg30niJaPWJXBmcG7I7Fs0aDT0X+kV9dbCRs9+3IQyEV t8vGi6ZDFkRtH7lONbN7Z++k+pR8xIpOBBm37g3xG6yAK4oYt1Z9Iir57yW487t2uK6F agDFDKwybCM5nIBezWsKVufpu4QdIcmWErAfN7kvFlifaWDb3WVwuiXu749tF3PWzIaZ BJzTbBlFkuUC/ql2HbsnoGwEi0VhSVAaq0aCWZgU2JpM9jwvA+k6KFFC4N/fhmjYeF+u xSeOV1ciuZV7LL+nDyzwsyMyOjsFYA0tq6MewtrzraCBN9WnBL6qB8vE2Ir9+cfVXwp5 KlJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725898970; x=1726503770; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=htF5qh+BwrQAazett+74anTVYDcrx88zDGCrAO2eD7Q=; b=iA/RyGLic/L82re+5brpDV3KS23iFTDAgXByRsrq6Y7DdvLoJaXpftv+4WTt15hAHp zpkHajJwKmuOWaaSW513S1U0y2uVjD1Reu7w27xEQa6LWMbtCliY9LGUOk7QP2IFwo3k oHAUuK36Nj5XGg7PIziZomS/9AGh0YyiUqW8oTM4mUlthvtJh7VLO28sDnyBb1EEghy7 ocEeoRYfpIiDRpjm2+fk5iFmIn+2nhEe6hQCBVxn6Ds9sK3lqpW47HRVe8EHBzOBvzi9 tDav5oL1k8bmuUVyPmFCCURP1X1TOxGzlZu7EE1Ub6aWyvbAAlR0rz4VOVswMiiVKmDJ eHCw== X-Gm-Message-State: AOJu0Yxh7lGvwsrno6DG6q98vHTu7dH8/NnGdCA0b4xk+rZMFgrMmngP RElLIskyfDzbN3iH1dDpFE8T9fwo2aKwi36UaSSFbCs91D0HqLlxe50nmHqHUgbsDMoGX9/vdwr N X-Google-Smtp-Source: AGHT+IHnDCshfaZ90PytRSBInZrrFGaoUSKbCZVQIkOcXEmRYHwkm8edHBVbnzVLV4lpA8GoAvw59g== X-Received: by 2002:a17:902:cec1:b0:205:8407:6321 with SMTP id d9443c01a7336-206f04a01fcmr132698365ad.9.1725898970527; Mon, 09 Sep 2024 09:22:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell Subject: [PATCH v2 09/29] target/arm: Simplify do_reduction_op Date: Mon, 9 Sep 2024 09:22:19 -0700 Message-ID: <20240909162240.647173-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240909162240.647173-1-richard.henderson@linaro.org> References: <20240909162240.647173-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1725899076298116600 Content-Type: text/plain; charset="utf-8" Use simple shift and add instead of ctpop, ctz, shift and mask. Unlike SVE, there is no predicate to disable elements. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 40 +++++++++++----------------------- 1 file changed, 13 insertions(+), 27 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 04160b2513..74efb35164 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -9027,34 +9027,23 @@ static void disas_data_proc_fp(DisasContext *s, uin= t32_t insn) * important for correct NaN propagation that we do these * operations in exactly the order specified by the pseudocode. * - * This is a recursive function, TCG temps should be freed by the - * calling function once it is done with the values. + * This is a recursive function. */ static TCGv_i32 do_reduction_op(DisasContext *s, int fpopcode, int rn, - int esize, int size, int vmap, TCGv_ptr fp= st) + MemOp esz, int ebase, int ecount, TCGv_ptr= fpst) { - if (esize =3D=3D size) { - int element; - MemOp msize =3D esize =3D=3D 16 ? MO_16 : MO_32; - TCGv_i32 tcg_elem; - - /* We should have one register left here */ - assert(ctpop8(vmap) =3D=3D 1); - element =3D ctz32(vmap); - assert(element < 8); - - tcg_elem =3D tcg_temp_new_i32(); - read_vec_element_i32(s, tcg_elem, rn, element, msize); + if (ecount =3D=3D 1) { + TCGv_i32 tcg_elem =3D tcg_temp_new_i32(); + read_vec_element_i32(s, tcg_elem, rn, ebase, esz); return tcg_elem; } else { - int bits =3D size / 2; - int shift =3D ctpop8(vmap) / 2; - int vmap_lo =3D (vmap >> shift) & vmap; - int vmap_hi =3D (vmap & ~vmap_lo); + int half =3D ecount >> 1; TCGv_i32 tcg_hi, tcg_lo, tcg_res; =20 - tcg_hi =3D do_reduction_op(s, fpopcode, rn, esize, bits, vmap_hi, = fpst); - tcg_lo =3D do_reduction_op(s, fpopcode, rn, esize, bits, vmap_lo, = fpst); + tcg_hi =3D do_reduction_op(s, fpopcode, rn, esz, + ebase + half, half, fpst); + tcg_lo =3D do_reduction_op(s, fpopcode, rn, esz, + ebase, half, fpst); tcg_res =3D tcg_temp_new_i32(); =20 switch (fpopcode) { @@ -9105,7 +9094,6 @@ static void disas_simd_across_lanes(DisasContext *s, = uint32_t insn) bool is_u =3D extract32(insn, 29, 1); bool is_fp =3D false; bool is_min =3D false; - int esize; int elements; int i; TCGv_i64 tcg_res, tcg_elt; @@ -9152,8 +9140,7 @@ static void disas_simd_across_lanes(DisasContext *s, = uint32_t insn) return; } =20 - esize =3D 8 << size; - elements =3D (is_q ? 128 : 64) / esize; + elements =3D (is_q ? 16 : 8) >> size; =20 tcg_res =3D tcg_temp_new_i64(); tcg_elt =3D tcg_temp_new_i64(); @@ -9208,9 +9195,8 @@ static void disas_simd_across_lanes(DisasContext *s, = uint32_t insn) */ TCGv_ptr fpst =3D fpstatus_ptr(size =3D=3D MO_16 ? FPST_FPCR_F16 := FPST_FPCR); int fpopcode =3D opcode | is_min << 4 | is_u << 5; - int vmap =3D (1 << elements) - 1; - TCGv_i32 tcg_res32 =3D do_reduction_op(s, fpopcode, rn, esize, - (is_q ? 128 : 64), vmap, fpst= ); + TCGv_i32 tcg_res32 =3D do_reduction_op(s, fpopcode, rn, size, + 0, elements, fpst); tcg_gen_extu_i32_i64(tcg_res, tcg_res32); } =20 --=20 2.43.0