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charset="utf-8" From: Suravee Suthikulpanit The XTSup mode enables x2APIC support for AMD IOMMU, which is needed to support vcpu w/ APIC ID > 255. Signed-off-by: Suravee Suthikulpanit Signed-off-by: Santosh Shukla --- hw/i386/amd_iommu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 5acb40fb909c..89d941fa4221 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -32,6 +32,7 @@ #include "trace.h" #include "hw/i386/apic-msidef.h" #include "hw/qdev-properties.h" +#include "kvm/kvm_i386.h" =20 /* used AMD-Vi MMIO registers */ const char *amdvi_mmio_low[] =3D { @@ -1651,6 +1652,16 @@ static void amdvi_sysbus_realize(DeviceState *dev, E= rror **errp) memory_region_add_subregion_overlap(&s->mr_sys, AMDVI_INT_ADDR_FIRST, &s->mr_ir, 1); =20 + /* AMD IOMMU with x2APIC mode requires xtsup=3Don */ + if (x86ms->apic_id_limit > 255 && !s->xtsup) { + error_report("AMD IOMMU with x2APIC confguration requires xtsup=3D= on"); + exit(EXIT_FAILURE); + } + if (s->xtsup && !kvm_enable_x2apic()) { + error_report("AMD IOMMU xt=3Don requires support on the KVM side"); + exit(EXIT_FAILURE); + } + pci_setup_iommu(bus, &amdvi_iommu_ops, s); amdvi_init(s); } --=20 2.43.5