From nobody Tue Feb 10 03:15:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1724852701; cv=none; d=zohomail.com; s=zohoarc; b=hKK8GKgi9/xvAmV7CulgRKDIIVdgvjtQaDRFaO4mz7N6C2yHqmMYmMerFgDj/VB5WOqUlNGWIKdG1DU1S1XJoxTXFyPUPRYLkj5P9hMzPLvYIfooqmoPe6j2L6jZWDI9jfe8cZNzEL/4QYfS56dF+J/HO1hNg1RssDb4OV06jk4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1724852701; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qxXaT5Ge9ysYGoLxhhM7szMpSqkvt89S9Abd0b/m8pw=; b=oFp9Mp/OEr+f2EroQmQxoLjzZHgV4tXKJVBt7aU7WJkIo1iOmhzi50DH5v45rcOnvwKZsYqhoJTFW3G6OFf3t0doiqrkrfaCXBHJljSsr+RgdW0jyuR7HamL+HUvLA6FFtx3HPjDruuGb+zNH6QW/x9Lp2Hl5cEnRoYYJ5aXDH0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1724852701496878.2666282970899; Wed, 28 Aug 2024 06:45:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sjIxW-0004So-H1; Wed, 28 Aug 2024 09:43:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sjIxU-0004Mo-V7 for qemu-devel@nongnu.org; Wed, 28 Aug 2024 09:43:36 -0400 Received: from mail-ej1-x62a.google.com ([2a00:1450:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sjIxT-0002Kr-9f for qemu-devel@nongnu.org; Wed, 28 Aug 2024 09:43:36 -0400 Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-a86acbaddb4so626340566b.1 for ; Wed, 28 Aug 2024 06:43:34 -0700 (PDT) Received: from corvink-nb.beckhoff.com ([195.226.174.194]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a88a48d4a39sm32606766b.12.2024.08.28.06.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Aug 2024 06:43:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724852613; x=1725457413; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qxXaT5Ge9ysYGoLxhhM7szMpSqkvt89S9Abd0b/m8pw=; b=LeHcZdFHC6TBjKH1DBNVz9C8/Pikg04Rz6ojz900inRfS9rSVKsgKzxLRnBhReo2dt iW/zOQz+0l0KZY8kbgAVPg4jh8qz9vE9q/hdhmQlwnqZOxMi3hTTFEUCAt98XEKMUj+o M2OBFehuGVNRaE3Od2RCkKmcZVsIYA5HzQ0QZJmkQEkpNAOA8deIl4oOYuC/lGOb/h1M FZ4JT5IEpw5JBMZQ25KzKGB+gGWQp40wTdpdEx/KbGHvwWbXVfBDewUfF1+BbxGTJ6QX dA9bosRjUDlmbVupb1vVKbUpOaKoF0/xaHoCUy8U0hKf72LsGAt2IJAvjyZ0d0OEeyJX AyBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724852613; x=1725457413; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qxXaT5Ge9ysYGoLxhhM7szMpSqkvt89S9Abd0b/m8pw=; b=GBE1eZNSvxIYlnVw8iFduitRdAnfcNtMGimc2E4cIOWGz5Rr20tZIPsoYaIPRsTgjO gJV2b1gInmQIBGf/JBFG6UXV25rQAnSf2kSrb4WzhUicxABE+C3V7ylekQpIU5kN0ApE cHAg4vxQg9N4TlvSccQndbT6tX4qlmx+CfmzvMNJTpl8zrVSrdZXeOogmmc/A3ZiMD8G MZJpLTa4ws6ca1Zeos+IFwMpe+q4z0eC6ubHHJk/Gt4XA0OcJPJK660MuEB+gI88FEAW MtLbIX/00NnGbN5opeuNxfZesR2RXPi5choSnp0MbMgB8qNm2RmgBOaJb0gzpgjq4jxL 9Lkg== X-Gm-Message-State: AOJu0YyTctBQmWFkspmvDYDcwX1Ohu8At9wwkAzMNcXqBl4fJ1/YC2gB 8/vv4uNWQuk4i2Jb72d6N8kX/7ZDTLZunA5ahxjnXMMDVx7tqwdLAtrtWg== X-Google-Smtp-Source: AGHT+IFBPL2h5aQ6nvjqF7BTB97SHmXxrdyU3doFhRkRnApjgalJnNaGNhC0vnl3utyq0YVakP+y6w== X-Received: by 2002:a17:907:7290:b0:a86:fa3d:e984 with SMTP id a640c23a62f3a-a870a9b4a93mr150040166b.20.1724852613026; Wed, 28 Aug 2024 06:43:33 -0700 (PDT) From: "=?UTF-8?q?Corvin=20K=C3=B6hne?=" X-Google-Original-From: =?UTF-8?q?Corvin=20K=C3=B6hne?= To: qemu-devel@nongnu.org, c.koehne@beckhoff.com Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Alex Williamson Subject: [PATCH v3 3/7] vfio/igd: use new BDSM register location and size for gen 11 and later Date: Wed, 28 Aug 2024 15:43:24 +0200 Message-ID: <20240828134328.94528-4-c.koehne@beckhoff.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240828134328.94528-1-c.koehne@beckhoff.com> References: <20240828134328.94528-1-c.koehne@beckhoff.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=corvin.koehne@gmail.com; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1724852703523116600 Intel changed the location and size of the BDSM register for gen 11 devices and later. We have to adjust our emulation for these devices to properly support them. Signed-off-by: Corvin K=C3=B6hne --- hw/vfio/igd.c | 31 ++++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index d5e57656a8..0b6533bbf7 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -100,11 +100,12 @@ static int igd_gen(VFIOPCIDevice *vdev) typedef struct VFIOIGDQuirk { struct VFIOPCIDevice *vdev; uint32_t index; - uint32_t bdsm; + uint64_t bdsm; } VFIOIGDQuirk; =20 #define IGD_GMCH 0x50 /* Graphics Control Register */ #define IGD_BDSM 0x5c /* Base Data of Stolen Memory */ +#define IGD_BDSM_GEN11 0xc0 /* Base Data of Stolen Memory of gen 11 and la= ter */ =20 =20 /* @@ -313,9 +314,13 @@ static void vfio_igd_quirk_data_write(void *opaque, hw= addr addr, */ if ((igd->index % 4 =3D=3D 1) && igd->index < vfio_igd_gtt_max(vdev)) { if (gen < 8 || (igd->index % 8 =3D=3D 1)) { - uint32_t base; + uint64_t base; =20 - base =3D pci_get_long(vdev->pdev.config + IGD_BDSM); + if (gen < 11) { + base =3D pci_get_long(vdev->pdev.config + IGD_BDSM); + } else { + base =3D pci_get_quad(vdev->pdev.config + IGD_BDSM_GEN11); + } if (!base) { hw_error("vfio-igd: Guest attempted to program IGD GTT bef= ore " "BIOS reserved stolen memory. Unsupported BIOS?"= ); @@ -519,7 +524,13 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, in= t nr) igd =3D quirk->data =3D g_malloc0(sizeof(*igd)); igd->vdev =3D vdev; igd->index =3D ~0; - igd->bdsm =3D vfio_pci_read_config(&vdev->pdev, IGD_BDSM, 4); + if (gen < 11) { + igd->bdsm =3D vfio_pci_read_config(&vdev->pdev, IGD_BDSM, 4); + } else { + igd->bdsm =3D vfio_pci_read_config(&vdev->pdev, IGD_BDSM_GEN11, 4); + igd->bdsm |=3D + (uint64_t)vfio_pci_read_config(&vdev->pdev, IGD_BDSM_GEN11 + 4= , 4) << 32; + } igd->bdsm &=3D ~((1 * MiB) - 1); /* 1MB aligned */ =20 memory_region_init_io(&quirk->mem[0], OBJECT(vdev), &vfio_igd_index_qu= irk, @@ -577,9 +588,15 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, in= t nr) pci_set_long(vdev->emulated_config_bits + IGD_GMCH, ~0); =20 /* BDSM is read-write, emulated. The BIOS needs to be able to write i= t */ - pci_set_long(vdev->pdev.config + IGD_BDSM, 0); - pci_set_long(vdev->pdev.wmask + IGD_BDSM, ~0); - pci_set_long(vdev->emulated_config_bits + IGD_BDSM, ~0); + if (gen < 11) { + pci_set_long(vdev->pdev.config + IGD_BDSM, 0); + pci_set_long(vdev->pdev.wmask + IGD_BDSM, ~0); + pci_set_long(vdev->emulated_config_bits + IGD_BDSM, ~0); + } else { + pci_set_quad(vdev->pdev.config + IGD_BDSM_GEN11, 0); + pci_set_quad(vdev->pdev.wmask + IGD_BDSM_GEN11, ~0); + pci_set_quad(vdev->emulated_config_bits + IGD_BDSM_GEN11, ~0); + } =20 /* * This IOBAR gives us access to GTTADR, which allows us to write to --=20 2.46.0