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Wed, 28 Aug 2024 02:53:36 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v4 16/17] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV Date: Wed, 28 Aug 2024 19:52:42 +1000 Message-Id: <20240828095243.90491-17-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240828095243.90491-1-itachis@FreeBSD.org> References: <20240828095243.90491-1-itachis@FreeBSD.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2a; envelope-from=itachis6234@gmail.com; helo=mail-oo1-xc2a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1724838959900116600 Content-Type: text/plain; charset="utf-8" From: Mark Corbin Added implementations for 'set_mcontext' and 'get_ucontext_sigreturn' functions for RISC-V architecture, Both functions ensure that the CPU state and user context are properly managed. Signed-off-by: Mark Corbin Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 54 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c index 072ad821d2..10c940cd49 100644 --- a/bsd-user/riscv/signal.c +++ b/bsd-user/riscv/signal.c @@ -114,3 +114,57 @@ abi_long get_mcontext(CPURISCVState *regs, target_mcon= text_t *mcp, =20 return 0; } + +/* Compare with set_mcontext() in riscv/riscv/exec_machdep.c */ +abi_long set_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, + int srflag) +{ + + regs->gpr[5] =3D tswap64(mcp->mc_gpregs.gp_t[0]); + regs->gpr[6] =3D tswap64(mcp->mc_gpregs.gp_t[1]); + regs->gpr[7] =3D tswap64(mcp->mc_gpregs.gp_t[2]); + regs->gpr[28] =3D tswap64(mcp->mc_gpregs.gp_t[3]); + regs->gpr[29] =3D tswap64(mcp->mc_gpregs.gp_t[4]); + regs->gpr[30] =3D tswap64(mcp->mc_gpregs.gp_t[5]); + regs->gpr[31] =3D tswap64(mcp->mc_gpregs.gp_t[6]); + + regs->gpr[8] =3D tswap64(mcp->mc_gpregs.gp_s[0]); + regs->gpr[9] =3D tswap64(mcp->mc_gpregs.gp_s[1]); + regs->gpr[18] =3D tswap64(mcp->mc_gpregs.gp_s[2]); + regs->gpr[19] =3D tswap64(mcp->mc_gpregs.gp_s[3]); + regs->gpr[20] =3D tswap64(mcp->mc_gpregs.gp_s[4]); + regs->gpr[21] =3D tswap64(mcp->mc_gpregs.gp_s[5]); + regs->gpr[22] =3D tswap64(mcp->mc_gpregs.gp_s[6]); + regs->gpr[23] =3D tswap64(mcp->mc_gpregs.gp_s[7]); + regs->gpr[24] =3D tswap64(mcp->mc_gpregs.gp_s[8]); + regs->gpr[25] =3D tswap64(mcp->mc_gpregs.gp_s[9]); + regs->gpr[26] =3D tswap64(mcp->mc_gpregs.gp_s[10]); + regs->gpr[27] =3D tswap64(mcp->mc_gpregs.gp_s[11]); + + regs->gpr[10] =3D tswap64(mcp->mc_gpregs.gp_a[0]); + regs->gpr[11] =3D tswap64(mcp->mc_gpregs.gp_a[1]); + regs->gpr[12] =3D tswap64(mcp->mc_gpregs.gp_a[2]); + regs->gpr[13] =3D tswap64(mcp->mc_gpregs.gp_a[3]); + regs->gpr[14] =3D tswap64(mcp->mc_gpregs.gp_a[4]); + regs->gpr[15] =3D tswap64(mcp->mc_gpregs.gp_a[5]); + regs->gpr[16] =3D tswap64(mcp->mc_gpregs.gp_a[6]); + regs->gpr[17] =3D tswap64(mcp->mc_gpregs.gp_a[7]); + + + regs->gpr[1] =3D tswap64(mcp->mc_gpregs.gp_ra); + regs->gpr[2] =3D tswap64(mcp->mc_gpregs.gp_sp); + regs->gpr[3] =3D tswap64(mcp->mc_gpregs.gp_gp); + regs->gpr[4] =3D tswap64(mcp->mc_gpregs.gp_tp); + regs->pc =3D tswap64(mcp->mc_gpregs.gp_sepc); + + return 0; +} + +/* Compare with sys_sigreturn() in riscv/riscv/machdep.c */ +abi_long get_ucontext_sigreturn(CPURISCVState *regs, + abi_ulong target_sf, abi_ulong *target_uc) +{ + + *target_uc =3D target_sf; + return 0; +} --=20 2.34.1