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([2804:7f0:b400:bb79:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-203b0e164b8sm24698805ad.236.2024.08.25.07.52.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Aug 2024 07:52:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1724597570; x=1725202370; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jMYYkx/opjLXIlYN94qCm43SuWEXEBRd8nT29zGh3do=; b=yT6jq6EBoP81fVEQKEYyQ/L2yews23NiEKxJS38Cnphe6O7kJUEjO17i9dtS3I0Yka sYf4y+3o5G1HTWHlFwW09Qf3Kb1IQ7jffHXgbkw6v6qL6oe1aNzIxLu908sCoX1Pi1Y1 uHf8qY6e0tPZ/QVvZtKs2D3NVN4XorwRTajkqCwziJGZJRN4vc9bYFOlv9NmLH27dQaX OMzmP4tQfVuN2VsEFg/tpR+uP1ngLUn3wWxR3y9XiK5+Ye0NpXk786aSHJwbaacrXX/2 jCbtCBprieqX0xyXOxpkdtspTDcRMQc1SWhTudgrFEjoy9jCb39qoH8fChEL2b/j4VPS 2T2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724597570; x=1725202370; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jMYYkx/opjLXIlYN94qCm43SuWEXEBRd8nT29zGh3do=; b=qkaAQMQB3swpvfKyCxUye9BUVcanFMnrK+BAdqC8ChYpXgyui0n5xTiRIT/wTAunaJ +bIomjwzYVysVZHk0kztcFlFjsXGCp+M5hmGMEO7jS5A7M0u4ETHrEtWWmFS5T22KAWO CO5T60PZUMTBoxT+9G/p2R/nedw8zS0ImCbJQrL7IYbVOrTYNxxWUdZBldy6gX/Yz8oJ gWQ4ytynlHiZXWisdtUrc4PgibRsVzesHUGvSMdchFM3/iBNazOFj/59S0yOhYrLWHto bg/A7YDIc7GR1k6Wxw4bXAiysHFaMzvnr5kdbJy2vs5JUq5Qd8upMa59zHx8MAK5PJi9 IBQg== X-Gm-Message-State: AOJu0Yyl3qxHTprsI5DVdLB9fiDEKMiipBCuzrMGkNLIxSbxpSb6+XIP Wpc+ZpjMdmmVgD+7cjVStckrFv3vnWZ4rYDdNDLeEuFVDtw2QRiV5kqYZLeTcmczPLwypKNEaED U6UA= X-Google-Smtp-Source: AGHT+IHr3X6RxbmOk2jT4WpWXSzwh3SiTatlduEw8vZKzCe6qU9wGKI5itkS9jzdqKuXwk6e/OOqhw== X-Received: by 2002:a17:902:dac4:b0:203:a116:7953 with SMTP id d9443c01a7336-203a1167a2dmr100748205ad.10.1724597569726; Sun, 25 Aug 2024 07:52:49 -0700 (PDT) From: Gustavo Romero To: qemu-devel@nongnu.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: philmd@linaro.org, peter.maydell@linaro.org, gustavo.romero@linaro.org Subject: [PATCH v3 1/4] gdbstub: Use specific MMU index when probing MTE addresses Date: Sun, 25 Aug 2024 14:52:05 +0000 Message-Id: <20240825145208.46774-2-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240825145208.46774-1-gustavo.romero@linaro.org> References: <20240825145208.46774-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1724597620368116600 Content-Type: text/plain; charset="utf-8" Use cpu_mmu_index() to determine the specific translation regime (MMU index) before probing addresses using allocation_tag_mem_probe(). Currently, the MMU index is hardcoded to 0 and only works for user mode. By obtaining the specific MMU index according to the translation regime, future use of the stubs relying on allocation_tag_mem_probe in other regimes will be possible, like in EL1. This commit also changes the ptr_size value passed to allocation_tag_mem_probe() from 8 to 1. The ptr_size parameter actually represents the number of bytes in the memory access (which can be as small as 1 byte), rather than the number of bits used in the address space pointed to by ptr. Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson --- target/arm/gdbstub64.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 5221381cc8..85a19c14c7 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -435,6 +435,7 @@ static void handle_q_memtag(GArray *params, void *user_= ctx) { ARMCPU *cpu =3D ARM_CPU(user_ctx); CPUARMState *env =3D &cpu->env; + uint32_t mmu_index; =20 uint64_t addr =3D gdb_get_cmd_param(params, 0)->val_ull; uint64_t len =3D gdb_get_cmd_param(params, 1)->val_ul; @@ -458,8 +459,10 @@ static void handle_q_memtag(GArray *params, void *user= _ctx) gdb_put_packet("E03"); } =20 + /* Find out the current translation regime for probe. */ + mmu_index =3D cpu_mmu_index(env_cpu(env), false); /* Note that tags are packed here (2 tags packed in one byte). */ - tags =3D allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64= -bit */, + tags =3D allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD,= 1, MMU_DATA_LOAD, true, 0); if (!tags) { /* Address is not in a tagged region. */ @@ -478,13 +481,16 @@ static void handle_q_isaddresstagged(GArray *params, = void *user_ctx) { ARMCPU *cpu =3D ARM_CPU(user_ctx); CPUARMState *env =3D &cpu->env; + uint32_t mmu_index; =20 uint64_t addr =3D gdb_get_cmd_param(params, 0)->val_ull; =20 uint8_t *tags; const char *reply; =20 - tags =3D allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64= -bit */, + /* Find out the current translation regime for probe. */ + mmu_index =3D cpu_mmu_index(env_cpu(env), false); + tags =3D allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD,= 1, MMU_DATA_LOAD, true, 0); reply =3D tags ? "01" : "00"; =20 @@ -495,6 +501,7 @@ static void handle_Q_memtag(GArray *params, void *user_= ctx) { ARMCPU *cpu =3D ARM_CPU(user_ctx); CPUARMState *env =3D &cpu->env; + uint32_t mmu_index; =20 uint64_t start_addr =3D gdb_get_cmd_param(params, 0)->val_ull; uint64_t len =3D gdb_get_cmd_param(params, 1)->val_ul; @@ -527,8 +534,10 @@ static void handle_Q_memtag(GArray *params, void *user= _ctx) * Get all tags in the page starting from the tag of the start address. * Note that there are two tags packed into a single byte here. */ - tags =3D allocation_tag_mem_probe(env, 0, start_addr, MMU_DATA_STORE, - 8 /* 64-bit */, MMU_DATA_STORE, true, = 0); + /* Find out the current translation regime for probe. */ + mmu_index =3D cpu_mmu_index(env_cpu(env), false); + tags =3D allocation_tag_mem_probe(env, mmu_index, start_addr, MMU_DATA= _STORE, + 1, MMU_DATA_STORE, true, 0); if (!tags) { /* Address is not in a tagged region. */ gdb_put_packet("E04"); --=20 2.34.1