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[95.127.41.181]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36e4cfefa29sm5284344f8f.61.2024.08.11.09.54.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 11 Aug 2024 09:54:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1723395251; x=1724000051; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=DgtScZp5V/ujQnHgw5dwPFrn6AurJ0lZHB0GF70OJbA=; b=UL/oz+7th6R0BCGXUHwbkTDLpNHdl7zWlUShQIce+XvfzhWi2ndjaUdcfyW1U8fCeO BFy8NRmjmD8tHuUQ0dIz3+0EvRI5WgXsXALtfiYwyDFodfkv85/w18euPcXyQTqX15UC mM403imywx2QmCF29GVxvSpKv3EPttv+b5X6ZkPCKl8qwFjEVuh3DwY8elK0eitGP1D0 NH4zrcwCrcoEM8REQdh7HLwbGz5I8+xSVGySV7E5aOkv21TT7xaghiOLlqV+W6TgvOAJ M14B0pJxvlBF+HYZxHFmBq1wt5RG4douFGH0kn2TB3T1Ct++A8F7uzFYl2mySKpVZwZq N0mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723395251; x=1724000051; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=DgtScZp5V/ujQnHgw5dwPFrn6AurJ0lZHB0GF70OJbA=; b=Z5L8wtYseV2yNzabpD3Mz6ZtIEXyxQ14Jkr7uGsCPe2prEKQEfcg6kvnefp39db5VN HuNx0xNzkmPNHSXZKLqYwqI5/p3FqzttPw3oz6lVQkEYASbNLgnju68wfGGkQbr1w4VU /D9qKXEVkUew9+vpZIGJ/3n3wSZ5FQBQnTpLBR1HlXeDDqEile/7HmiL0ZUb40K6QlGQ KECTa+EXcRJ+GCcYbh8SSMK4zBwZjTZ8YSidbuM/YH6q6/X0o4Vp61SgVtqU1H01SgxL PaIp4KCp8a0pcY0JwOgAHVFtJGltgEdmOkpnV9XVTx4JAgq/+83paQCoiStDDozHEpYt PSbA== X-Gm-Message-State: AOJu0Yx/izQE538azYlNdvRAVJ+/A/pXBELwDFXeURWdO908Nd8+3ni4 fHYhffXWb5AcFtdBYVK3VeY0CO4uz4/moEPBjvJikYue51gICOx5T6aXhddeaASomZpuP6HdDXv H X-Google-Smtp-Source: AGHT+IGbAXOI3QnAjZepP2jwXtwYPfMSh7pjv06YyPBjWcZ3X+2eGVJo0lgQMCyojCX/tPJXyY9uDw== X-Received: by 2002:a5d:54d0:0:b0:367:4d9d:56a5 with SMTP id ffacd0b85a97d-36d5fd7fa73mr3945521f8f.44.1723395251076; Sun, 11 Aug 2024 09:54:11 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Thomas Petazzoni , Waldemar Brodkorb Subject: [PATCH-for-9.1] target/mips: Fix execution mode in page_table_walk_refill() Date: Sun, 11 Aug 2024 18:54:07 +0200 Message-ID: <20240811165407.26312-1-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1723395313543116600 When refactoring page_table_walk_refill() in commit 4e999bf419 we replaced the execution mode and forced it to kernel mode. Restore the previous behavior to also get supervisor / user modes. Reported-by: Thomas Petazzoni Reported-by: Waldemar Brodkorb Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2470 Fixes: 4e999bf419 ("target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fi= ll") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang --- target/mips/tcg/sysemu/tlb_helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/t= lb_helper.c index 3ba6d369a6..e7ae4f0bef 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -940,8 +940,9 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, * Memory reads during hardware page table walking are performed * as if they were kernel-mode load instructions. */ - int ptw_mmu_idx =3D (env->hflags & MIPS_HFLAG_ERL ? - MMU_ERL_IDX : MMU_KERNEL_IDX); + int ptw_mmu_idx =3D (env->hflags & MIPS_HFLAG_ERL) + ? MMU_ERL_IDX + : (env->hflags & MIPS_HFLAG_KSU); =20 if (page_table_walk_refill(env, address, ptw_mmu_idx)) { ret =3D get_physical_address(env, &physical, &prot, address, --=20 2.45.2