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[176.184.30.206]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9d433fesm553882366b.142.2024.08.06.05.53.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 06 Aug 2024 05:53:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722948796; x=1723553596; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U580Wrx23+PhRsFUSNYJ7VRxWznSc+VPsbnAWBKD3bQ=; b=sDqRb/RbBX0jVhU208EUXKra82bsALAL6DeXOUAFDWNxuFsF02JR6Ys9g5DGSgDUu4 uDE5ZADoiJ/LJUH38wVHQiRiHcH1s/6hnqmTaSwlUyrEFAE/YbHSnCl3smBDDvQFbbab mDYpYl0iroYvywYFzaKMiBmOXicTnsNwac39haFHBcCRGS24c0M43OdcQMWPHikxY9K8 b46ZavsqnVYuGiiWMrcS3jen6wSUMB7MCYj9ukSj0RRVA001mIBolZLjTMaZut26wgCC xG8d9nPsMNKDw4xvR4/FxxSuhYMqX4Pswoy7F+KslvHUlrEvoAgA5hF1VNERUtIe6Y46 UDjQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722948796; x=1723553596; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U580Wrx23+PhRsFUSNYJ7VRxWznSc+VPsbnAWBKD3bQ=; b=DqBny5W78Y9Hb02rctLYXkcYtIq/NCFvqvyLI/NDo9A0umdXwrKYYQd6i135gHjwpE RA0T+CxQf8JpskJ3o7qYythtQVwbEKnX9d3XqTcXK33BVY0X0FL2n8mCppzBhP8QNi+h Dc8/EapvA4IZW3KcUbZj8dJP3i7Ra0ANA1+sBVP4G/pzTNyMMOfhUceAXTITrp0CtOAk YGhoY0V9yhyqyKYjxs2R6DD91IXLEkUkqTvtfOqyv3bgEoyjpKlT1fVMqvtOZCdEKL3W YlB5wzqnkkeSUG1d6Z86rQqC5Xl664KbGNkrTpse9MjZ+WIySW5U/ZY3b8nwYoDYSYT3 eGCQ== X-Gm-Message-State: AOJu0YxX+8YrWpj9+JJWMUs3N7SFKO7f4s9UcbZMSIxyrImefeFh7ljy hcmS9pAkJspwBs17c16J6LZQGNcEbcexC+eC9lkdBt41m5gijpzYDDRDQxfjLDvgOU4MC/yIjOv I X-Google-Smtp-Source: AGHT+IEj9N4cn5WwXBmjwWcidUZC8CWdQYZBhYpacbwWDzAyx2zcWNoXFTylRkL1biBANRw9Aa9FtA== X-Received: by 2002:a05:6512:3b8b:b0:530:ae0d:9fc8 with SMTP id 2adb3069b0e04-530bb36b6bcmr11186553e87.2.1722948795857; Tue, 06 Aug 2024 05:53:15 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bibo Mao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Song Gao , Richard Henderson , Jiaxun Yang Subject: [PULL 12/28] hw/intc/loongarch_ipi: Add loongarch IPI support Date: Tue, 6 Aug 2024 14:51:40 +0200 Message-ID: <20240806125157.91185-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240806125157.91185-1-philmd@linaro.org> References: <20240806125157.91185-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=philmd@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1722948815497116600 From: Bibo Mao Loongarch IPI is added here, it inherits from class TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can be used when ipi is emulated in userspace with KVM mode. Signed-off-by: Bibo Mao [PMD: Rebased and simplified] Co-Developed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Bibo Mao Tested-by: Bibo Mao Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Song Gao Reviewed-by: Richard Henderson Reviewed-by: Jiaxun Yang Tested-by: Jiaxun Yang Message-Id: <20240805180622.21001-13-philmd@linaro.org> --- include/hw/intc/loongarch_ipi.h | 25 ++++++++++++ hw/intc/loongarch_ipi.c | 68 +++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 4 ++ hw/intc/meson.build | 1 + 4 files changed, 98 insertions(+) create mode 100644 include/hw/intc/loongarch_ipi.h create mode 100644 hw/intc/loongarch_ipi.c diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ip= i.h new file mode 100644 index 0000000000..276b3040a3 --- /dev/null +++ b/include/hw/intc/loongarch_ipi.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * LoongArch IPI interrupt header files + * + * Copyright (C) 2024 Loongson Technology Corporation Limited + */ + +#ifndef HW_LOONGARCH_IPI_H +#define HW_LOONGARCH_IPI_H + +#include "qom/object.h" +#include "hw/intc/loongson_ipi_common.h" + +#define TYPE_LOONGARCH_IPI "loongarch_ipi" +OBJECT_DECLARE_TYPE(LoongarchIPIState, LoongarchIPIClass, LOONGARCH_IPI) + +struct LoongarchIPIState { + LoongsonIPICommonState parent_obj; +}; + +struct LoongarchIPIClass { + LoongsonIPICommonClass parent_class; +}; + +#endif diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c new file mode 100644 index 0000000000..2ae1a42c46 --- /dev/null +++ b/hw/intc/loongarch_ipi.c @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * LoongArch IPI interrupt support + * + * Copyright (C) 2024 Loongson Technology Corporation Limited + */ + +#include "qemu/osdep.h" +#include "hw/boards.h" +#include "hw/intc/loongarch_ipi.h" +#include "target/loongarch/cpu.h" + +static AddressSpace *get_iocsr_as(CPUState *cpu) +{ + return LOONGARCH_CPU(cpu)->env.address_space_iocsr; +} + +static int archid_cmp(const void *a, const void *b) +{ + CPUArchId *archid_a =3D (CPUArchId *)a; + CPUArchId *archid_b =3D (CPUArchId *)b; + + return archid_a->arch_id - archid_b->arch_id; +} + +static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id) +{ + CPUArchId apic_id, *found_cpu; + + apic_id.arch_id =3D id; + found_cpu =3D bsearch(&apic_id, ms->possible_cpus->cpus, + ms->possible_cpus->len, + sizeof(*ms->possible_cpus->cpus), + archid_cmp); + + return found_cpu; +} + +static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id) +{ + MachineState *machine =3D MACHINE(qdev_get_machine()); + CPUArchId *archid; + + archid =3D find_cpu_by_archid(machine, arch_id); + if (archid) { + return CPU(archid->cpu); + } + + return NULL; +} + +static void loongarch_ipi_class_init(ObjectClass *klass, void *data) +{ + LoongsonIPICommonClass *licc =3D LOONGSON_IPI_COMMON_CLASS(klass); + + licc->get_iocsr_as =3D get_iocsr_as; + licc->cpu_by_arch_id =3D loongarch_cpu_by_arch_id; +} + +static const TypeInfo loongarch_ipi_types[] =3D { + { + .name =3D TYPE_LOONGARCH_IPI, + .parent =3D TYPE_LOONGSON_IPI_COMMON, + .class_init =3D loongarch_ipi_class_init, + } +}; + +DEFINE_TYPES(loongarch_ipi_types) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index a2a0fdca85..dd405bdb5d 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -94,6 +94,10 @@ config LOONGSON_IPI bool select LOONGSON_IPI_COMMON =20 +config LOONGARCH_IPI + bool + select LOONGSON_IPI_COMMON + config LOONGARCH_PCH_PIC bool select UNIMP diff --git a/hw/intc/meson.build b/hw/intc/meson.build index a09a527207..f4d81eb8e4 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -71,6 +71,7 @@ specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongs= on_ipi_common.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.= c')) +specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ip= i.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarc= h_pch_pic.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarc= h_pch_msi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch= _extioi.c')) --=20 2.45.2