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Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Jason Wang , Sriram Yagnaraman , Keith Busch , Klaus Jensen Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Yui Washizu , Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2607:f8b0:4864:20::631; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @daynix-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1722581528210116600 Signed-off-by: Akihiko Odaki --- docs/system/sriov.rst | 3 ++- include/hw/pci/pcie_sriov.h | 7 +++++-- hw/pci/pcie_sriov.c | 12 ++++++++---- hw/virtio/virtio-pci.c | 16 ++++++++++------ 4 files changed, 25 insertions(+), 13 deletions(-) diff --git a/docs/system/sriov.rst b/docs/system/sriov.rst index a851a66a4b8b..d12178f3c319 100644 --- a/docs/system/sriov.rst +++ b/docs/system/sriov.rst @@ -28,7 +28,8 @@ virtio-net-pci functions to a bus. Below is a command lin= e example: The VFs specify the paired PF with ``sriov-pf`` property. The PF must be added after all VFs. It is the user's responsibility to ensure that VFs ha= ve function numbers larger than one of the PF, and that the function numbers -have a consistent stride. +have a consistent stride. Both the PF and VFs are ARI-capable so you can h= ave +255 VFs at maximum. =20 You may also need to perform additional steps to activate the SR-IOV featu= re on your guest. For Linux, refer to [1]_. diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index f75b8f22ee92..aeaa38cf3456 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -43,12 +43,15 @@ void pcie_sriov_vf_register_bar(PCIDevice *dev, int reg= ion_num, =20 /** * pcie_sriov_pf_init_from_user_created_vfs() - Initialize PF with user-cr= eated - * VFs. + * VFs, adding ARI to PF * @dev: A PCIe device being realized. * @offset: The offset of the SR-IOV capability. * @errp: pointer to Error*, to store an error if it happens. * - * Return: The size of added capability. 0 if the user did not create VFs. + * Initializes a PF with user-created VFs, adding the ARI extended capabil= ity to + * the PF. The VFs should call pcie_ari_init() to form an ARI device. + * + * Return: The size of added capabilities. 0 if the user did not create VF= s. * -1 if failed. */ int16_t pcie_sriov_pf_init_from_user_created_vfs(PCIDevice *dev, diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 0c875e61fe96..64c655db29c4 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -90,12 +90,10 @@ static bool pcie_sriov_pf_init_common(PCIDevice *dev, u= int16_t offset, } =20 if (total_vfs) { - uint16_t ari_cap =3D pcie_find_capability(dev, PCI_EXT_CAP_ID_ARI); uint16_t first_vf_devfn =3D dev->devfn + vf_offset; uint16_t last_vf_devfn =3D first_vf_devfn + vf_stride * (total_vfs= - 1); =20 - if ((!ari_cap && PCI_SLOT(dev->devfn) !=3D PCI_SLOT(last_vf_devfn)= ) || - last_vf_devfn >=3D PCI_DEVFN_MAX) { + if (last_vf_devfn >=3D PCI_DEVFN_MAX) { error_setg(errp, "VF function number overflows"); return false; } @@ -257,6 +255,7 @@ int16_t pcie_sriov_pf_init_from_user_created_vfs(PCIDev= ice *dev, PCIDevice **vfs; BusState *bus =3D qdev_get_parent_bus(DEVICE(dev)); uint16_t ven_id =3D pci_get_word(dev->config + PCI_VENDOR_ID); + uint16_t size =3D PCI_EXT_CAP_SRIOV_SIZEOF; uint16_t vf_dev_id; uint16_t vf_offset; uint16_t vf_stride; @@ -323,6 +322,11 @@ int16_t pcie_sriov_pf_init_from_user_created_vfs(PCIDe= vice *dev, return -1; } =20 + if (!pcie_find_capability(dev, PCI_EXT_CAP_ID_ARI)) { + pcie_ari_init(dev, offset + size); + size +=3D PCI_ARI_SIZEOF; + } + for (i =3D 0; i < pf->len; i++) { vfs[i]->exp.sriov_vf.pf =3D dev; vfs[i]->exp.sriov_vf.vf_number =3D i; @@ -343,7 +347,7 @@ int16_t pcie_sriov_pf_init_from_user_created_vfs(PCIDev= ice *dev, } } =20 - return PCI_EXT_CAP_SRIOV_SIZEOF; + return size; } =20 bool pcie_sriov_register_device(PCIDevice *dev, Error **errp) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 0c8fcc5627d5..b19e2983ee22 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2102,12 +2102,16 @@ static void virtio_pci_device_plugged(DeviceState *= d, Error **errp) PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); } =20 - res =3D pcie_sriov_pf_init_from_user_created_vfs(&proxy->pci_dev, - proxy->last_pcie_cap_of= fset, - errp); - if (res > 0) { - proxy->last_pcie_cap_offset +=3D res; - virtio_add_feature(&vdev->host_features, VIRTIO_F_SR_IOV); + if (pci_is_vf(&proxy->pci_dev)) { + pcie_ari_init(&proxy->pci_dev, proxy->last_pcie_cap_offset); + proxy->last_pcie_cap_offset +=3D PCI_ARI_SIZEOF; + } else { + res =3D pcie_sriov_pf_init_from_user_created_vfs( + &proxy->pci_dev, proxy->last_pcie_cap_offset, errp); + if (res > 0) { + proxy->last_pcie_cap_offset +=3D res; + virtio_add_feature(&vdev->host_features, VIRTIO_F_SR_IOV); + } } } =20 --=20 2.45.2