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v2 2/4] hw/sd/sdhci: Reduce variables scope in get_adma_description() Date: Wed, 31 Jul 2024 23:24:59 +0200 Message-ID: <20240731212501.44385-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240731212501.44385-1-philmd@linaro.org> References: <20240731212501.44385-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1722461175912116600 The 'adma1' variable is only used in the SDHC_CTRL_ADMA1_32 case, and 'adma2' in SDHC_CTRL_ADMA2_32. Add braces in the switch case to use local declarations. Do the same in the SDHC_CTRL_ADMA2_64 case because we'll add a local variable there in the next commit. Replace 0xFFFFF000 -> ~0xfff to align with our codebase style. No functional change intended. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/sd/sdhci.c | 87 ++++++++++++++++++++++++++++----------------------- 1 file changed, 48 insertions(+), 39 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 773f2b284b..0a95f49b93 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -700,50 +700,59 @@ static void trace_adma_description(const char *type, = const ADMADescr *dscr) =20 static void get_adma_description(SDHCIState *s, ADMADescr *dscr) { - uint32_t adma1 =3D 0; - uint64_t adma2 =3D 0; hwaddr entry_addr =3D (hwaddr)s->admasysaddr; switch (SDHC_DMA_TYPE(s->hostctl1)) { case SDHC_CTRL_ADMA2_32: - dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2), - MEMTXATTRS_UNSPECIFIED); - adma2 =3D le64_to_cpu(adma2); - /* The spec does not specify endianness of descriptor table. - * We currently assume that it is LE. - */ - dscr->addr =3D (hwaddr)extract64(adma2, 32, 32) & ~0x3ull; - dscr->length =3D (uint16_t)extract64(adma2, 16, 16); - dscr->attr =3D (uint8_t)extract64(adma2, 0, 7); - dscr->incr =3D 8; - trace_adma_description("ADMA2_32", dscr); - break; - case SDHC_CTRL_ADMA1_32: - dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1), - MEMTXATTRS_UNSPECIFIED); - adma1 =3D le32_to_cpu(adma1); - dscr->addr =3D (hwaddr)(adma1 & 0xFFFFF000); - dscr->attr =3D (uint8_t)extract32(adma1, 0, 7); - dscr->incr =3D 4; - if ((dscr->attr & SDHC_ADMA_ATTR_ACT_MASK) =3D=3D SDHC_ADMA_ATTR_S= ET_LEN) { - dscr->length =3D (uint16_t)extract32(adma1, 12, 16); - } else { - dscr->length =3D 4 * KiB; + { + uint64_t adma2 =3D 0; + + dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2), + MEMTXATTRS_UNSPECIFIED); + adma2 =3D le64_to_cpu(adma2); + /* + * The spec does not specify endianness of descriptor table. + * We currently assume that it is LE. + */ + dscr->addr =3D (hwaddr)extract64(adma2, 32, 32) & ~0x3ull; + dscr->length =3D (uint16_t)extract64(adma2, 16, 16); + dscr->attr =3D (uint8_t)extract64(adma2, 0, 7); + dscr->incr =3D 8; + trace_adma_description("ADMA2_32", dscr); + break; + } + case SDHC_CTRL_ADMA1_32: + { + uint32_t adma1 =3D 0; + + dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1), + MEMTXATTRS_UNSPECIFIED); + adma1 =3D le32_to_cpu(adma1); + dscr->addr =3D (hwaddr)(adma1 & ~0xfff); + dscr->attr =3D (uint8_t)extract32(adma1, 0, 7); + dscr->incr =3D 4; + if ((dscr->attr & SDHC_ADMA_ATTR_ACT_MASK) =3D=3D SDHC_ADMA_AT= TR_SET_LEN) { + dscr->length =3D (uint16_t)extract32(adma1, 12, 16); + } else { + dscr->length =3D 4 * KiB; + } + trace_adma_description("ADMA1_32", dscr); + break; } - trace_adma_description("ADMA1_32", dscr); - break; case SDHC_CTRL_ADMA2_64: - dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1, - MEMTXATTRS_UNSPECIFIED); - dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2, - MEMTXATTRS_UNSPECIFIED); - dscr->length =3D le16_to_cpu(dscr->length); - dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8, - MEMTXATTRS_UNSPECIFIED); - dscr->addr =3D le64_to_cpu(dscr->addr); - dscr->attr &=3D (uint8_t) ~0xC0; - dscr->incr =3D 12; - trace_adma_description("ADMA2_64", dscr); - break; + { + dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1, + MEMTXATTRS_UNSPECIFIED); + dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2, + MEMTXATTRS_UNSPECIFIED); + dscr->length =3D le16_to_cpu(dscr->length); + dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8, + MEMTXATTRS_UNSPECIFIED); + dscr->addr =3D le64_to_cpu(dscr->addr); + dscr->attr &=3D (uint8_t) ~0xC0; + dscr->incr =3D 12; + trace_adma_description("ADMA2_64", dscr); + break; + } } } =20 --=20 2.45.2