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Tsirkin" , Marcel Apfelbaum , Richard Henderson , Eduardo Habkost , qemu-devel@nongnu.org Cc: Zhao Liu Subject: [PATCH 1/4] target/i386/cpu: Remove unnecessary SGX feature words checks Date: Tue, 30 Jul 2024 12:55:41 +0800 Message-Id: <20240730045544.2516284-2-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240730045544.2516284-1-zhao1.liu@intel.com> References: <20240730045544.2516284-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.14; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.125, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1722314462397116600 Content-Type: text/plain; charset="utf-8" CPUID.0x7.0.ebx and CPUID.0x7.0.ecx leaves have been expressed as the feature word lists, and the Host capability support has been checked in x86_cpu_filter_features(). Therefore, such checks on SGX feature "words" are redundant, and the follow-up adjustments to those feature "words" will not actually take effect. Remove unnecessary SGX feature words related checks. Signed-off-by: Zhao Liu --- target/i386/cpu.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4688d140c2d9..2b3642c9b13c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6537,8 +6537,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 7: /* Structured Extended Feature Flags Enumeration Leaf */ if (count =3D=3D 0) { - uint32_t eax_0_unused, ebx_0, ecx_0, edx_0_unused; - /* Maximum ECX value for sub-leaves */ *eax =3D env->cpuid_level_func7; *ebx =3D env->features[FEAT_7_0_EBX]; /* Feature flags */ @@ -6548,20 +6546,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,= uint32_t count, } *edx =3D env->features[FEAT_7_0_EDX]; /* Feature flags */ =20 - /* - * SGX cannot be emulated in software. If hardware does not - * support enabling SGX and/or SGX flexible launch control, - * then we need to update the VM's CPUID values accordingly. - */ - x86_cpu_get_supported_cpuid(0x7, 0, - &eax_0_unused, &ebx_0, - &ecx_0, &edx_0_unused); - if ((*ebx & CPUID_7_0_EBX_SGX) && !(ebx_0 & CPUID_7_0_EBX_SGX)= ) { - *ebx &=3D ~CPUID_7_0_EBX_SGX; - } - if ((*ecx & CPUID_7_0_ECX_SGX_LC) - && (!(*ebx & CPUID_7_0_EBX_SGX) || !(ecx_0 & CPUID_7_0= _ECX_SGX_LC))) { + && (!(*ebx & CPUID_7_0_EBX_SGX))) { *ecx &=3D ~CPUID_7_0_ECX_SGX_LC; } } else if (count =3D=3D 1) { --=20 2.34.1