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Thu, 25 Jul 2024 16:59:38 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, BALATON Zoltan Subject: [PULL 91/96] target/ppc/mmu_common.c: Remove mmu_ctx_t Date: Fri, 26 Jul 2024 09:54:04 +1000 Message-ID: <20240725235410.451624-92-npiggin@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240725235410.451624-1-npiggin@gmail.com> References: <20240725235410.451624-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=npiggin@gmail.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1721952409870116600 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan Completely get rid of mmu_ctx_t after converting the remaining functions to pass raddr and prot without the context struct. Signed-off-by: BALATON Zoltan Reviewed-by: Nicholas Piggin Signed-off-by: Nicholas Piggin --- target/ppc/mmu_common.c | 25 +++++++------------------ 1 file changed, 7 insertions(+), 18 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 4770b43630..60f8736210 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -37,12 +37,6 @@ =20 /* #define DUMP_PAGE_TABLES */ =20 -/* Context used internally during MMU translations */ -typedef struct { - hwaddr raddr; /* Real address */ - int prot; /* Protection bits */ -} mmu_ctx_t; - void ppc_store_sdr1(CPUPPCState *env, target_ulong value) { PowerPCCPU *cpu =3D env_archcpu(env); @@ -264,8 +258,8 @@ static int get_bat_6xx_tlb(CPUPPCState *env, hwaddr *ra= ddr, int *prot, return ret; } =20 -static int mmu6xx_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, +static int mmu6xx_get_physical_address(CPUPPCState *env, hwaddr *raddr, + int *prot, target_ulong eaddr, hwaddr *hashp, bool *keyp, MMUAccessType access_type, int type) { @@ -277,8 +271,7 @@ static int mmu6xx_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, =20 /* First try to find a BAT entry if there are any */ if (env->nb_BATs && - get_bat_6xx_tlb(env, &ctx->raddr, &ctx->prot, eaddr, - access_type, pr) =3D=3D 0) { + get_bat_6xx_tlb(env, raddr, prot, eaddr, access_type, pr) =3D=3D 0= ) { return 0; } =20 @@ -316,7 +309,7 @@ static int mmu6xx_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, *hashp =3D hash; =20 /* Software TLB search */ - return ppc6xx_tlb_check(env, &ctx->raddr, &ctx->prot, eaddr, + return ppc6xx_tlb_check(env, raddr, prot, eaddr, access_type, ptem, key, nx); } =20 @@ -333,7 +326,7 @@ static int mmu6xx_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, * Should make the instruction do no-op. As it already do * no-op, it's quite easy :-) */ - ctx->raddr =3D eaddr; + *raddr =3D eaddr; return 0; case ACCESS_CODE: /* No code fetch is allowed in direct-store areas */ case ACCESS_FLOAT: /* Floating point load/store */ @@ -343,7 +336,7 @@ static int mmu6xx_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, } if ((access_type =3D=3D MMU_DATA_STORE || !key) && (access_type =3D=3D MMU_DATA_LOAD || key)) { - ctx->raddr =3D eaddr; + *raddr =3D eaddr; return 2; } return -2; @@ -681,7 +674,6 @@ static bool ppc_6xx_xlate(PowerPCCPU *cpu, vaddr eaddr, { CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; - mmu_ctx_t ctx; hwaddr hash =3D 0; /* init to 0 to avoid used uninit warning */ bool key; int type, ret; @@ -700,12 +692,9 @@ static bool ppc_6xx_xlate(PowerPCCPU *cpu, vaddr eaddr, type =3D ACCESS_INT; } =20 - ctx.prot =3D 0; - ret =3D mmu6xx_get_physical_address(env, &ctx, eaddr, &hash, &key, + ret =3D mmu6xx_get_physical_address(env, raddrp, protp, eaddr, &hash, = &key, access_type, type); if (ret =3D=3D 0) { - *raddrp =3D ctx.raddr; - *protp =3D ctx.prot; *psizep =3D TARGET_PAGE_BITS; return true; } else if (!guest_visible) { --=20 2.45.2