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Wed, 17 Jul 2024 14:48:35 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Song Gao Subject: [PATCH v3 11/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler Date: Wed, 17 Jul 2024 23:47:02 +0200 Message-ID: <20240717214708.78403-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1721253012498116600 From: Bibo Mao Allow Loongson IPI implementations to have their own cpu_by_arch_id() handler. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/intc/loongson_ipi_common.h | 1 + hw/intc/loongson_ipi.c | 10 +++++++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongs= on_ipi_common.h index e49c156db3..5447e9f650 100644 --- a/include/hw/intc/loongson_ipi_common.h +++ b/include/hw/intc/loongson_ipi_common.h @@ -41,6 +41,7 @@ struct LoongsonIPICommonClass { SysBusDeviceClass parent_class; =20 AddressSpace *(*get_iocsr_as)(CPUState *cpu); + CPUState *(*cpu_by_arch_id)(int64_t id); }; =20 /* Mainy used by iocsr read and write */ diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 4a7a1fa38d..603a88356d 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -128,12 +128,13 @@ static MemTxResult send_ipi_data(LoongsonIPICommonSta= te *ipi, CPUState *cpu, static MemTxResult mail_send(LoongsonIPICommonState *ipi, uint64_t val, MemTxAttrs attrs) { + LoongsonIPICommonClass *licc =3D LOONGSON_IPI_COMMON_GET_CLASS(ipi); uint32_t cpuid; hwaddr addr; CPUState *cs; =20 cpuid =3D extract32(val, 16, 10); - cs =3D cpu_by_arch_id(cpuid); + cs =3D licc->cpu_by_arch_id(cpuid); if (cs =3D=3D NULL) { return MEMTX_DECODE_ERROR; } @@ -147,12 +148,13 @@ static MemTxResult mail_send(LoongsonIPICommonState *= ipi, static MemTxResult any_send(LoongsonIPICommonState *ipi, uint64_t val, MemTxAttrs attrs) { + LoongsonIPICommonClass *licc =3D LOONGSON_IPI_COMMON_GET_CLASS(ipi); uint32_t cpuid; hwaddr addr; CPUState *cs; =20 cpuid =3D extract32(val, 16, 10); - cs =3D cpu_by_arch_id(cpuid); + cs =3D licc->cpu_by_arch_id(cpuid); if (cs =3D=3D NULL) { return MEMTX_DECODE_ERROR; } @@ -169,6 +171,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaqu= e, hwaddr addr, { IPICore *s =3D opaque; LoongsonIPICommonState *ipi =3D s->ipi; + LoongsonIPICommonClass *licc =3D LOONGSON_IPI_COMMON_GET_CLASS(ipi); int index =3D 0; uint32_t cpuid; uint8_t vector; @@ -203,7 +206,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaqu= e, hwaddr addr, cpuid =3D extract32(val, 16, 10); /* IPI status vector */ vector =3D extract8(val, 0, 5); - cs =3D cpu_by_arch_id(cpuid); + cs =3D licc->cpu_by_arch_id(cpuid); if (cs =3D=3D NULL || cs->cpu_index >=3D ipi->num_cpu) { return MEMTX_DECODE_ERROR; } @@ -349,6 +352,7 @@ static void loongson_ipi_class_init(ObjectClass *klass,= void *data) device_class_set_parent_realize(dc, loongson_ipi_realize, &lic->parent_realize); licc->get_iocsr_as =3D get_iocsr_as; + licc->cpu_by_arch_id =3D cpu_by_arch_id; } =20 static void loongson_ipi_finalize(Object *obj) --=20 2.41.0