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([203.56.128.103]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b7ecd603bsm7330404b3a.219.2024.07.16.23.09.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jul 2024 23:09:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721196564; x=1721801364; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AQvo1o7d9A2n1k+IrItgyP1l57+YBBMV11r5JjrVtfk=; b=bTHSlWY972Yo8enAQG7koeGtzCj302e3F8lh8IUwI8UWWgShhZ1NXd8vIYdUcQqUi9 VNBkIHxNPpFKbqpd4zfbsYBGulqB89NH7miKTIiJ5Y0hQ7dMta7d4I3OjBYFf5K0crVz rMWAl35BYxlEUDYx3DoY9qtg7hvZUYrKn1lymNHap0uUM3j4dR2vUlH6x+JBikzSt17S EjKWZjo8vXwhlxrs20PWVpe96QWM7Z2YYTtUZrpkDQWBo33MG3kNNDcU5kmHMzfY9CNq /y8xUZkNGEtxux3GoRga5lUtaiU+Ig28Lza54bsF8fO/ofBNHP8lso0codgYpTNLUOuF 9goA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721196564; x=1721801364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AQvo1o7d9A2n1k+IrItgyP1l57+YBBMV11r5JjrVtfk=; b=MFqgbrfjSA+XOsR/LjtLozXGTbzeKXFE8jA23CIqk5Hh16nMybLeXdRUPYEO8ucjzb nkGmz9L9DShFuXB+HZzFY0N0sgQK0gdetwagpV+xeWiVwg165UmQqZ9dbsICTLKZ7F7m hkUOe4pXJ06JgvtSRaawLbrKhEeP6yVHTH2gXiAif4BnWp2yHjpyvNghqm/4+92Ehp8s x6MIM7h5rsGVyvZanp0X+yDfTobkiADsVbaWWPIiVKVi7KK2NftpsraE21kXAe1pQt2k CBSUoow0ur23fr4FToyiWrYwC37CcjZ304jkMnLrIakYlq0TLFEP992GbibwA9NkJjjp nUdA== X-Gm-Message-State: AOJu0YyvwOO4V1ZtrE00peq1Z1w6j1jVOHq6bZW6KHytX2hKPrdTwp9M vkKM9gWgkg5UJPVTz6GN09gKO9wSCD3Q3wky5k8Kr77uozB7qHMGB1ttf2cZ4b5vHGoi2JOksK7 dDMQ= X-Google-Smtp-Source: AGHT+IGb3Rnx42S+/sO9/ARKf7gixTw8CzedX53jyJfd3dHGMfn+qZPumtj9FekQbZ8uyreH7OYGQA== X-Received: by 2002:a05:6a00:1250:b0:704:2696:d08e with SMTP id d2e1a72fcca58-70ce4f8e96bmr752191b3a.13.1721196563795; Tue, 16 Jul 2024 23:09:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 05/17] target/arm: Simplify do_reduction_op Date: Wed, 17 Jul 2024 16:08:51 +1000 Message-ID: <20240717060903.205098-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240717060903.205098-1-richard.henderson@linaro.org> References: <20240717060903.205098-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1721196612845116600 Content-Type: text/plain; charset="utf-8" Use simple shift and add instead of ctpop, ctz, shift and mask. Unlike SVE, there is no predicate to disable elements. Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 40 +++++++++++----------------------- 1 file changed, 13 insertions(+), 27 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index e0314a1253..6d2e1a2d80 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -8986,34 +8986,23 @@ static void disas_data_proc_fp(DisasContext *s, uin= t32_t insn) * important for correct NaN propagation that we do these * operations in exactly the order specified by the pseudocode. * - * This is a recursive function, TCG temps should be freed by the - * calling function once it is done with the values. + * This is a recursive function. */ static TCGv_i32 do_reduction_op(DisasContext *s, int fpopcode, int rn, - int esize, int size, int vmap, TCGv_ptr fp= st) + MemOp esz, int ebase, int ecount, TCGv_ptr= fpst) { - if (esize =3D=3D size) { - int element; - MemOp msize =3D esize =3D=3D 16 ? MO_16 : MO_32; - TCGv_i32 tcg_elem; - - /* We should have one register left here */ - assert(ctpop8(vmap) =3D=3D 1); - element =3D ctz32(vmap); - assert(element < 8); - - tcg_elem =3D tcg_temp_new_i32(); - read_vec_element_i32(s, tcg_elem, rn, element, msize); + if (ecount =3D=3D 1) { + TCGv_i32 tcg_elem =3D tcg_temp_new_i32(); + read_vec_element_i32(s, tcg_elem, rn, ebase, esz); return tcg_elem; } else { - int bits =3D size / 2; - int shift =3D ctpop8(vmap) / 2; - int vmap_lo =3D (vmap >> shift) & vmap; - int vmap_hi =3D (vmap & ~vmap_lo); + int half =3D ecount >> 1; TCGv_i32 tcg_hi, tcg_lo, tcg_res; =20 - tcg_hi =3D do_reduction_op(s, fpopcode, rn, esize, bits, vmap_hi, = fpst); - tcg_lo =3D do_reduction_op(s, fpopcode, rn, esize, bits, vmap_lo, = fpst); + tcg_hi =3D do_reduction_op(s, fpopcode, rn, esz, + ebase + half, half, fpst); + tcg_lo =3D do_reduction_op(s, fpopcode, rn, esz, + ebase, half, fpst); tcg_res =3D tcg_temp_new_i32(); =20 switch (fpopcode) { @@ -9064,7 +9053,6 @@ static void disas_simd_across_lanes(DisasContext *s, = uint32_t insn) bool is_u =3D extract32(insn, 29, 1); bool is_fp =3D false; bool is_min =3D false; - int esize; int elements; int i; TCGv_i64 tcg_res, tcg_elt; @@ -9111,8 +9099,7 @@ static void disas_simd_across_lanes(DisasContext *s, = uint32_t insn) return; } =20 - esize =3D 8 << size; - elements =3D (is_q ? 128 : 64) / esize; + elements =3D (is_q ? 16 : 8) >> size; =20 tcg_res =3D tcg_temp_new_i64(); tcg_elt =3D tcg_temp_new_i64(); @@ -9167,9 +9154,8 @@ static void disas_simd_across_lanes(DisasContext *s, = uint32_t insn) */ TCGv_ptr fpst =3D fpstatus_ptr(size =3D=3D MO_16 ? FPST_FPCR_F16 := FPST_FPCR); int fpopcode =3D opcode | is_min << 4 | is_u << 5; - int vmap =3D (1 << elements) - 1; - TCGv_i32 tcg_res32 =3D do_reduction_op(s, fpopcode, rn, esize, - (is_q ? 128 : 64), vmap, fpst= ); + TCGv_i32 tcg_res32 =3D do_reduction_op(s, fpopcode, rn, size, + 0, elements, fpst); tcg_gen_extu_i32_i64(tcg_res, tcg_res32); } =20 --=20 2.43.0