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Sun, 14 Jul 2024 04:11:05 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEpf+h8gZreDBO6VscnfqTTsEQIe0mSAMI6xX0bC/DIgT15TtqGO2J0okjdeQ/kwActLdyuCw== X-Received: by 2002:a05:6512:2350:b0:52c:987f:b355 with SMTP id 2adb3069b0e04-52eb99cc6abmr11898919e87.42.1720955465155; Sun, 14 Jul 2024 04:11:05 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 07/13] target/i386/tcg: Compute MMU index once Date: Sun, 14 Jul 2024 13:10:37 +0200 Message-ID: <20240714111043.14132-8-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240714111043.14132-1-pbonzini@redhat.com> References: <20240714111043.14132-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1720955529296116600 Content-Type: text/plain; charset="utf-8" Add the MMU index to the StackAccess struct, so that it can be cached or (in the next patch) computed from information that is not in CPUX86State. Co-developed-by: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/seg_helper.c | 35 ++++++++++++++++++++++------------- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index b6902ca3fba..8a6d92b3583 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -56,36 +56,37 @@ typedef struct StackAccess target_ulong ss_base; target_ulong sp; target_ulong sp_mask; + int mmu_index; } StackAccess; =20 static void pushw(StackAccess *sa, uint16_t val) { sa->sp -=3D 2; - cpu_stw_kernel_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), - val, sa->ra); + cpu_stw_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), + val, sa->mmu_index, sa->ra); } =20 static void pushl(StackAccess *sa, uint32_t val) { sa->sp -=3D 4; - cpu_stl_kernel_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), - val, sa->ra); + cpu_stl_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), + val, sa->mmu_index, sa->ra); } =20 static uint16_t popw(StackAccess *sa) { - uint16_t ret =3D cpu_lduw_data_ra(sa->env, - sa->ss_base + (sa->sp & sa->sp_mask), - sa->ra); + uint16_t ret =3D cpu_lduw_mmuidx_ra(sa->env, + sa->ss_base + (sa->sp & sa->sp_mask), + sa->mmu_index, sa->ra); sa->sp +=3D 2; return ret; } =20 static uint32_t popl(StackAccess *sa) { - uint32_t ret =3D cpu_ldl_data_ra(sa->env, - sa->ss_base + (sa->sp & sa->sp_mask), - sa->ra); + uint32_t ret =3D cpu_ldl_mmuidx_ra(sa->env, + sa->ss_base + (sa->sp & sa->sp_mask), + sa->mmu_index, sa->ra); sa->sp +=3D 4; return ret; } @@ -677,6 +678,7 @@ static void do_interrupt_protected(CPUX86State *env, in= t intno, int is_int, =20 sa.env =3D env; sa.ra =3D 0; + sa.mmu_index =3D cpu_mmu_index_kernel(env); =20 if (type =3D=3D 5) { /* task gate */ @@ -858,12 +860,12 @@ static void do_interrupt_protected(CPUX86State *env, = int intno, int is_int, static void pushq(StackAccess *sa, uint64_t val) { sa->sp -=3D 8; - cpu_stq_kernel_ra(sa->env, sa->sp, val, sa->ra); + cpu_stq_mmuidx_ra(sa->env, sa->sp, val, sa->mmu_index, sa->ra); } =20 static uint64_t popq(StackAccess *sa) { - uint64_t ret =3D cpu_ldq_data_ra(sa->env, sa->sp, sa->ra); + uint64_t ret =3D cpu_ldq_mmuidx_ra(sa->env, sa->sp, sa->mmu_index, sa-= >ra); sa->sp +=3D 8; return ret; } @@ -982,6 +984,7 @@ static void do_interrupt64(CPUX86State *env, int intno,= int is_int, =20 sa.env =3D env; sa.ra =3D 0; + sa.mmu_index =3D cpu_mmu_index_kernel(env); sa.sp_mask =3D -1; sa.ss_base =3D 0; if (dpl < cpl || ist !=3D 0) { @@ -1116,6 +1119,7 @@ static void do_interrupt_real(CPUX86State *env, int i= ntno, int is_int, sa.sp =3D env->regs[R_ESP]; sa.sp_mask =3D 0xffff; sa.ss_base =3D env->segs[R_SS].base; + sa.mmu_index =3D cpu_mmu_index_kernel(env); =20 if (is_int) { old_eip =3D next_eip; @@ -1579,6 +1583,7 @@ void helper_lcall_real(CPUX86State *env, uint32_t new= _cs, uint32_t new_eip, sa.sp =3D env->regs[R_ESP]; sa.sp_mask =3D get_sp_mask(env->segs[R_SS].flags); sa.ss_base =3D env->segs[R_SS].base; + sa.mmu_index =3D cpu_mmu_index_kernel(env); =20 if (shift) { pushl(&sa, env->segs[R_CS].selector); @@ -1618,6 +1623,7 @@ void helper_lcall_protected(CPUX86State *env, int new= _cs, target_ulong new_eip, =20 sa.env =3D env; sa.ra =3D GETPC(); + sa.mmu_index =3D cpu_mmu_index_kernel(env); =20 if (e2 & DESC_S_MASK) { if (!(e2 & DESC_CS_MASK)) { @@ -1905,6 +1911,7 @@ void helper_iret_real(CPUX86State *env, int shift) =20 sa.env =3D env; sa.ra =3D GETPC(); + sa.mmu_index =3D x86_mmu_index_pl(env, 0); sa.sp_mask =3D 0xffff; /* XXXX: use SS segment size? */ sa.sp =3D env->regs[R_ESP]; sa.ss_base =3D env->segs[R_SS].base; @@ -1976,8 +1983,11 @@ static inline void helper_ret_protected(CPUX86State = *env, int shift, target_ulong new_eip, new_esp; StackAccess sa; =20 + cpl =3D env->hflags & HF_CPL_MASK; + sa.env =3D env; sa.ra =3D retaddr; + sa.mmu_index =3D x86_mmu_index_pl(env, cpl); =20 #ifdef TARGET_X86_64 if (shift =3D=3D 2) { @@ -2032,7 +2042,6 @@ static inline void helper_ret_protected(CPUX86State *= env, int shift, !(e2 & DESC_CS_MASK)) { raise_exception_err_ra(env, EXCP0D_GPF, new_cs & 0xfffc, retaddr); } - cpl =3D env->hflags & HF_CPL_MASK; rpl =3D new_cs & 3; if (rpl < cpl) { raise_exception_err_ra(env, EXCP0D_GPF, new_cs & 0xfffc, retaddr); --=20 2.45.2