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Fri, 12 Jul 2024 05:04:28 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , Harsh Prateek Bora , qemu-devel@nongnu.org Subject: [PATCH v2 15/19] ppc/pnv: Add big-core machine property Date: Fri, 12 Jul 2024 22:02:42 +1000 Message-ID: <20240712120247.477133-16-npiggin@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240712120247.477133-1-npiggin@gmail.com> References: <20240712120247.477133-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=npiggin@gmail.com; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1720785892776116600 Content-Type: text/plain; charset="utf-8" Big-core implementation is complete, so expose it as a machine property that may be set with big-core=3Don option on powernv9 and powernv10 machines. Signed-off-by: Nicholas Piggin --- hw/ppc/pnv.c | 62 +++++++++++++++++++++++++++++++++++------------ hw/ppc/pnv_core.c | 2 +- 2 files changed, 47 insertions(+), 17 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 24f7c007ce..e405d416ff 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2338,6 +2338,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Erro= r **errp) &error_abort); =20 pnv_core->tod_state.big_core_quirk =3D pmc->quirk_tb_big_core; + pnv_core->big_core =3D chip->big_core; =20 qdev_realize(DEVICE(pnv_core), NULL, &error_fatal); =20 @@ -2578,6 +2579,34 @@ static int pnv10_xive_match_nvt(XiveFabric *xfb, uin= t8_t format, return total_count; } =20 +static bool pnv_machine_get_big_core(Object *obj, Error **errp) +{ + PnvMachineState *pnv =3D PNV_MACHINE(obj); + return pnv->big_core; +} + +static void pnv_machine_set_big_core(Object *obj, bool value, Error **errp) +{ + PnvMachineState *pnv =3D PNV_MACHINE(obj); + pnv->big_core =3D value; +} + +static bool pnv_machine_get_hb(Object *obj, Error **errp) +{ + PnvMachineState *pnv =3D PNV_MACHINE(obj); + + return !!pnv->fw_load_addr; +} + +static void pnv_machine_set_hb(Object *obj, bool value, Error **errp) +{ + PnvMachineState *pnv =3D PNV_MACHINE(obj); + + if (value) { + pnv->fw_load_addr =3D 0x8000000; + } +} + static void pnv_machine_power8_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -2629,6 +2658,12 @@ static void pnv_machine_power9_class_init(ObjectClas= s *oc, void *data) pmc->dt_power_mgt =3D pnv_dt_power_mgt; =20 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB); + + object_class_property_add_bool(oc, "big-core", + pnv_machine_get_big_core, + pnv_machine_set_big_core); + object_class_property_set_description(oc, "big-core", + "Use big-core (aka fused-core) mode"); } =20 static void pnv_machine_p10_common_class_init(ObjectClass *oc, void *data) @@ -2665,6 +2700,17 @@ static void pnv_machine_power10_class_init(ObjectCla= ss *oc, void *data) =20 pnv_machine_p10_common_class_init(oc, data); mc->desc =3D "IBM PowerNV (Non-Virtualized) POWER10"; + + /* + * This is the parent of POWER10 Rainier class, so properies go here + * rather than common init (which would add them to both parent and + * child which is invalid). + */ + object_class_property_add_bool(oc, "big-core", + pnv_machine_get_big_core, + pnv_machine_set_big_core); + object_class_property_set_description(oc, "big-core", + "Use big-core (aka fused-core) mode"); } =20 static void pnv_machine_p10_rainier_class_init(ObjectClass *oc, void *data) @@ -2677,22 +2723,6 @@ static void pnv_machine_p10_rainier_class_init(Objec= tClass *oc, void *data) pmc->i2c_init =3D pnv_rainier_i2c_init; } =20 -static bool pnv_machine_get_hb(Object *obj, Error **errp) -{ - PnvMachineState *pnv =3D PNV_MACHINE(obj); - - return !!pnv->fw_load_addr; -} - -static void pnv_machine_set_hb(Object *obj, bool value, Error **errp) -{ - PnvMachineState *pnv =3D PNV_MACHINE(obj); - - if (value) { - pnv->fw_load_addr =3D 0x8000000; - } -} - static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg) { CPUPPCState *env =3D cpu_env(cs); diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index a96ec4e2b9..238a4cd4ab 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -296,7 +296,7 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) obj =3D object_new(typename); cpu =3D POWERPC_CPU(obj); =20 - pc->threads[i] =3D POWERPC_CPU(obj); + pc->threads[i] =3D cpu; if (cc->nr_threads > 1) { cpu->env.has_smt_siblings =3D true; } --=20 2.45.1